On Mon, 16 Mar 2020 12:54:52 +0100 (CET)
Mark Kettenis <mark.kette...@xs4all.nl> wrote:
> I had a look at what NetBSD does, and they use '%L0' instead of
> '%0+1'. As far as I can tell this works on both gcc and clang. The
> diff below produces a working kernel when building with gcc. Not yet
> in a position to test a clang-built kernel myself yet. But if this
> produces a working kernel with clang as well, I'd prefer this diff
> instead of yours.
Yes, the clang kernel is working with your %L0 diff and the noinline
stuff. I now prefer your %L0 diff, ok gkoehler@
"mftb %L0" becomes "mftb ${0:L}" in LLVM IR (clang -S -emit-llvm),
then LLVM handles the 'L' in PPCAsmPrinter::PrintAsmOperand in
/usr/src/gnu/llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp
> Index: arch/powerpc/include/cpu.h
> ===================================================================
> RCS file: /cvs/src/sys/arch/powerpc/include/cpu.h,v
> retrieving revision 1.65
> diff -u -p -r1.65 cpu.h
> --- arch/powerpc/include/cpu.h 23 Mar 2019 05:27:53 -0000 1.65
> +++ arch/powerpc/include/cpu.h 16 Mar 2020 11:30:42 -0000
> @@ -336,7 +336,7 @@ ppc_mftb(void)
> u_long scratch;
> u_int64_t tb;
>
> - __asm volatile ("1: mftbu %0; mftb %0+1; mftbu %1;"
> + __asm volatile ("1: mftbu %0; mftb %L0; mftbu %1;"
> " cmpw 0,%0,%1; bne 1b" : "=r"(tb), "=r"(scratch));
> return tb;
> }
--
George Koehler <kern...@gmail.com>
