> On 5 Jun 2020, at 4:33 am, Christian Weisgerber <na...@mips.inka.de> wrote:
> 
> Here's a proposal for implementing cpu_rnd_messybits() as a read of
> the cycle counter on alpha, powerpc, and sparc64.  Since I don't have
> those archs, the diff is not even compile-tested.
> 
> * alpha: RPCC is a 32-bit counter (in a 64-bit register)
> * powerpc: TB is a 64-bit counter split into two registers
> * sparc64: TICK is a(n implementation-defined, up to) 63-bit counter

ok by me.

> 
> 
> Index: sys/arch/alpha/alpha/machdep.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/alpha/alpha/machdep.c,v
> retrieving revision 1.191
> diff -u -p -r1.191 machdep.c
> --- sys/arch/alpha/alpha/machdep.c    31 May 2020 06:23:56 -0000      1.191
> +++ sys/arch/alpha/alpha/machdep.c    4 Jun 2020 17:57:45 -0000
> @@ -1854,12 +1854,3 @@ alpha_XXX_dmamap(v)                                    
>         /* XXX */
>       return (vtophys(v) | alpha_XXX_dmamap_or);              /* XXX */
> }                                                             /* XXX */
> /* XXX XXX END XXX XXX */
> -
> -unsigned int
> -cpu_rnd_messybits(void)
> -{
> -     struct timespec ts;
> -
> -     nanotime(&ts);
> -     return (ts.tv_nsec ^ (ts.tv_sec << 20));
> -}
> Index: sys/arch/alpha/include/cpu.h
> ===================================================================
> RCS file: /cvs/src/sys/arch/alpha/include/cpu.h,v
> retrieving revision 1.62
> diff -u -p -r1.62 cpu.h
> --- sys/arch/alpha/include/cpu.h      31 May 2020 06:23:56 -0000      1.62
> +++ sys/arch/alpha/include/cpu.h      4 Jun 2020 17:59:25 -0000
> @@ -288,7 +288,11 @@ do {                                                     
>                 \
>  */
> #define       cpu_number()            alpha_pal_whami()
> 
> -unsigned int cpu_rnd_messybits(void);
> +static inline unsigned int
> +cpu_rnd_messybits(void)
> +{
> +     return alpha_rpcc();
> +}
> 
> /*
>  * Arguments to hardclock and gatherstats encapsulate the previous
> Index: sys/arch/macppc/macppc/machdep.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/macppc/macppc/machdep.c,v
> retrieving revision 1.191
> diff -u -p -r1.191 machdep.c
> --- sys/arch/macppc/macppc/machdep.c  31 May 2020 06:23:57 -0000      1.191
> +++ sys/arch/macppc/macppc/machdep.c  4 Jun 2020 18:07:31 -0000
> @@ -913,12 +913,3 @@ cpu_switchto(struct proc *oldproc, struc
> 
>       cpu_switchto_asm(oldproc, newproc);
> }
> -
> -unsigned int
> -cpu_rnd_messybits(void)
> -{
> -     struct timespec ts;
> -
> -     nanotime(&ts);
> -     return (ts.tv_nsec ^ (ts.tv_sec << 20));
> -}
> Index: sys/arch/powerpc/include/cpu.h
> ===================================================================
> RCS file: /cvs/src/sys/arch/powerpc/include/cpu.h,v
> retrieving revision 1.67
> diff -u -p -r1.67 cpu.h
> --- sys/arch/powerpc/include/cpu.h    31 May 2020 06:23:58 -0000      1.67
> +++ sys/arch/powerpc/include/cpu.h    4 Jun 2020 18:13:07 -0000
> @@ -161,7 +161,15 @@ extern int ppc_nobat;
> 
> void  cpu_bootstrap(void);
> 
> -unsigned int cpu_rnd_messybits(void);
> +static inline unsigned int
> +cpu_rnd_messybits(void)
> +{
> +     unsigned int hi, lo;
> +
> +     __asm volatile("mftbu %0; mftb %1" : "=r" (hi), "=r" (lo));
> +
> +     return (hi ^ lo);
> +}
> 
> /*
>  * This is used during profiling to integrate system time.
> Index: sys/arch/sparc64/include/cpu.h
> ===================================================================
> RCS file: /cvs/src/sys/arch/sparc64/include/cpu.h,v
> retrieving revision 1.94
> diff -u -p -r1.94 cpu.h
> --- sys/arch/sparc64/include/cpu.h    31 May 2020 06:23:58 -0000      1.94
> +++ sys/arch/sparc64/include/cpu.h    4 Jun 2020 18:05:18 -0000
> @@ -211,7 +211,15 @@ void     cpu_unidle(struct cpu_info *);
> #define curpcb                __curcpu->ci_cpcb
> #define fpproc                __curcpu->ci_fpproc
> 
> -unsigned int cpu_rnd_messybits(void);
> +static inline unsigned int
> +cpu_rnd_messybits(void)
> +{
> +     u_int64_t tick;
> +
> +     __asm volatile("rd %%tick, %0" : "=r" (tick) :);
> +
> +     return ((tick >> 32) ^ tick);
> +}
> 
> /*
>  * On processors with multiple threads we force a thread switch.
> Index: sys/arch/sparc64/sparc64/machdep.c
> ===================================================================
> RCS file: /cvs/src/sys/arch/sparc64/sparc64/machdep.c,v
> retrieving revision 1.196
> diff -u -p -r1.196 machdep.c
> --- sys/arch/sparc64/sparc64/machdep.c        31 May 2020 06:23:58 -0000      
> 1.196
> +++ sys/arch/sparc64/sparc64/machdep.c        4 Jun 2020 18:01:16 -0000
> @@ -2114,12 +2114,3 @@ blink_led_timeout(void *vsc)
>       t = (((averunnable.ldavg[0] + FSCALE) * hz) >> (FSHIFT + 1));
>       timeout_add(&sc->bls_to, t);
> }
> -
> -unsigned int
> -cpu_rnd_messybits(void)
> -{
> -     struct timespec ts;
> -
> -     nanotime(&ts);
> -     return (ts.tv_nsec ^ (ts.tv_sec << 20));
> -}
> -- 
> Christian "naddy" Weisgerber                          na...@mips.inka.de
> 

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