On 2022/06/29 13:19, Stuart Henderson wrote:
> On 2022/06/28 23:11, Jonathan Matthew wrote:
> > This adds the (not quite) final bits to em(4) to enable multiple rx/tx
> > queues.
> > Note that desktop/laptop models (I218, I219 etc.) do not support multiple
> > queues,
> > so this only really applies to servers and network appliances (including
> > APU2).
> >
> > It also removes the 'em_enable_msix' variable, in favour of using MSI-X on
> > devices
> > that support multiple queues and MSI or INTX everywhere else.
> >
> > I've tested this with an I350 on amd64 and arm64, where it works as
> > expected, and
> > with the I218-LM in my laptop where it does nothing (as expected).
> > More testing is welcome, especially in forwarding environments.
>
> Doesn't break things but doesn't do anything on i386 (I guess there's no
> MSI-X?)
On amd64 on a similar machine, it works
I guess it maybe related to this in ppb.c
#ifdef __i386__
if (pci_intr_map(pa, &ih) == 0)
sc->sc_intrhand = pci_intr_establish(pc, ih, IPL_BIO,
ppb_intr, sc, self->dv_xname);
#else
if (pci_intr_map_msi(pa, &ih) == 0 ||
pci_intr_map(pa, &ih) == 0)
sc->sc_intrhand = pci_intr_establish(pc, ih, IPL_BIO,
ppb_intr, sc, self->dv_xname);
#endif
