Le Wed, Jul 06, 2022 at 10:45:39PM +0200, Mark Kettenis a écrit : > Now that the kernel supports the extended BOOTARG_CONSDEV struct and > snaps with that change are out there, here is the diff that changes > the amd64 bootloaders to switch to the extended struct and provide the > parameters necessary for using the non-standard UART on the AMD Ryzen > Embedded V1000 SoCs. > > It would be good if someone can confirm this works on something like > an APU. >
I don't have any other EFI appliance to test but it reads fine, applies and builds OK. Anyway, I could not make it work on the AMD Ryzen Embedded V1000. I might be missing a step here. I built a kernel with the diff applied, built the ramdrive and tried to boot it but it still reboots when in ELFNAME(). > ok? > > > Index: stand/boot/conf.c > =================================================================== > RCS file: /cvs/src/sys/arch/amd64/stand/boot/conf.c,v > retrieving revision 1.53 > diff -u -p -r1.53 conf.c > --- stand/boot/conf.c 9 Dec 2020 18:10:17 -0000 1.53 > +++ stand/boot/conf.c 6 Jul 2022 20:02:13 -0000 > @@ -41,7 +41,7 @@ > #include <biosdev.h> > #include <dev/cons.h> > > -const char version[] = "3.53"; > +const char version[] = "3.54"; > int debug = 1; > > > Index: stand/cdboot/conf.c > =================================================================== > RCS file: /cvs/src/sys/arch/amd64/stand/cdboot/conf.c,v > retrieving revision 1.47 > diff -u -p -r1.47 conf.c > --- stand/cdboot/conf.c 9 Dec 2020 18:10:18 -0000 1.47 > +++ stand/cdboot/conf.c 6 Jul 2022 20:02:13 -0000 > @@ -42,7 +42,7 @@ > #include <biosdev.h> > #include <dev/cons.h> > > -const char version[] = "3.53"; > +const char version[] = "3.54"; > int debug = 1; > > > Index: stand/efiboot/conf.c > =================================================================== > RCS file: /cvs/src/sys/arch/amd64/stand/efiboot/conf.c,v > retrieving revision 1.37 > diff -u -p -r1.37 conf.c > --- stand/efiboot/conf.c 20 Jun 2022 02:22:05 -0000 1.37 > +++ stand/efiboot/conf.c 6 Jul 2022 20:02:13 -0000 > @@ -40,7 +40,7 @@ > #include "efidev.h" > #include "efipxe.h" > > -const char version[] = "3.60"; > +const char version[] = "3.61"; > > #ifdef EFI_DEBUG > int debug = 0; > Index: stand/efiboot/efiboot.c > =================================================================== > RCS file: /cvs/src/sys/arch/amd64/stand/efiboot/efiboot.c,v > retrieving revision 1.39 > diff -u -p -r1.39 efiboot.c > --- stand/efiboot/efiboot.c 20 Jun 2022 02:22:05 -0000 1.39 > +++ stand/efiboot/efiboot.c 6 Jul 2022 20:02:13 -0000 > @@ -938,6 +938,70 @@ efi_makebootargs(void) > addbootarg(BOOTARG_EFIINFO, sizeof(bios_efiinfo), &bios_efiinfo); > } > > +/* Vendor device path used to indicate the mmio UART on AMD SoCs. */ > +#define AMDSOC_DEVPATH \ > + { 0xe76fd4e9, 0x0a30, 0x4ca9, \ > + { 0x95, 0x40, 0xd7, 0x99, 0x53, 0x4c, 0xc4, 0xff } } > + > +void > +efi_setconsdev(void) > +{ > + bios_consdev_t cd; > + EFI_STATUS status; > + UINT8 data[128]; > + UINTN size = sizeof(data); > + EFI_DEVICE_PATH *dp = (void *)data; > + VENDOR_DEVICE_PATH *vdp; > + UART_DEVICE_PATH *udp; > + EFI_GUID global = EFI_GLOBAL_VARIABLE; > + EFI_GUID amdsoc = AMDSOC_DEVPATH; > + > + memset(&cd, 0, sizeof(cd)); > + cd.consdev = cn_tab->cn_dev; > + cd.conspeed = com_speed; > + cd.consaddr = com_addr; > + > + /* > + * If the ConOut variable indicates we're using a serial > + * console, use it to determine the baud rate. > + */ > + status = RS->GetVariable(L"ConOut", &global, NULL, &size, &data); > + if (status == EFI_SUCCESS) { > + for (dp = (void *)data; !IsDevicePathEnd(dp); > + dp = NextDevicePathNode(dp)) { > + /* > + * AMD Ryzen Embedded V1000 SoCs integrate a > + * Synopsys DesignWare UART that is not > + * compatible with the traditional 8250 UART > + * found on the IBM PC. Pass the magic > + * parameters to the kernel to make this UART > + * work. > + */ > + if (DevicePathType(dp) == HARDWARE_DEVICE_PATH && > + DevicePathSubType(dp) == HW_VENDOR_DP) { > + vdp = (VENDOR_DEVICE_PATH *)dp; > + if (efi_guidcmp(&vdp->Guid, &amdsoc) == 0) { > + cd.consdev = makedev(8, 4); > + cd.consaddr = *(uint64_t *)(vdp + 1); > + cd.consfreq = 48000000; > + cd.flags = BCD_MMIO; > + cd.reg_width = 4; > + cd.reg_shift = 2; > + } > + } > + > + if (DevicePathType(dp) == MESSAGING_DEVICE_PATH && > + DevicePathSubType(dp) == MSG_UART_DP) { > + udp = (UART_DEVICE_PATH *)dp; > + if (cd.conspeed == -1) > + cd.conspeed = udp->BaudRate; > + } > + } > + } > + > + addbootarg(BOOTARG_CONSDEV, sizeof(cd), &cd); > +} > + > void > _rtt(void) > { > Index: stand/efiboot/efiboot.h > =================================================================== > RCS file: /cvs/src/sys/arch/amd64/stand/efiboot/efiboot.h,v > retrieving revision 1.4 > diff -u -p -r1.4 efiboot.h > --- stand/efiboot/efiboot.h 25 Nov 2017 19:02:07 -0000 1.4 > +++ stand/efiboot/efiboot.h 6 Jul 2022 20:02:13 -0000 > @@ -34,6 +34,7 @@ int Xvideo_efi(void); > int Xgop_efi(void); > int Xexit_efi(void); > void efi_makebootargs(void); > +void efi_setconsdev(void); > > int Xpoweroff_efi(void); > > Index: stand/efiboot/exec_i386.c > =================================================================== > RCS file: /cvs/src/sys/arch/amd64/stand/efiboot/exec_i386.c,v > retrieving revision 1.8 > diff -u -p -r1.8 exec_i386.c > --- stand/efiboot/exec_i386.c 30 Jun 2022 15:46:57 -0000 1.8 > +++ stand/efiboot/exec_i386.c 6 Jul 2022 20:02:13 -0000 > @@ -72,9 +72,6 @@ run_loadfile(uint64_t *marks, int howto) > dev_t bootdev = bootdev_dip->bootdev; > size_t ac = BOOTARG_LEN; > caddr_t av = (caddr_t)BOOTARG_OFF; > - bios_oconsdev_t cd; > - extern int com_speed; /* from bioscons.c */ > - extern int com_addr; > bios_ddb_t ddb; > extern int db_console; > bios_bootduid_t bootduid; > @@ -89,15 +86,10 @@ run_loadfile(uint64_t *marks, int howto) > if ((av = alloc(ac)) == NULL) > panic("alloc for bootarg"); > efi_makebootargs(); > + efi_setconsdev(); > delta = DEFAULT_KERNEL_ADDRESS - efi_loadaddr; > if (sa_cleanup != NULL) > (*sa_cleanup)(); > - > - cd.consdev = cn_tab->cn_dev; > - cd.conspeed = com_speed; > - cd.consaddr = com_addr; > - cd.consfreq = 0; > - addbootarg(BOOTARG_CONSDEV, sizeof(cd), &cd); > > if (bootmac != NULL) > addbootarg(BOOTARG_BOOTMAC, sizeof(bios_bootmac_t), bootmac); > Index: stand/libsa/exec_i386.c > =================================================================== > RCS file: /cvs/src/sys/arch/amd64/stand/libsa/exec_i386.c,v > retrieving revision 1.36 > diff -u -p -r1.36 exec_i386.c > --- stand/libsa/exec_i386.c 30 Jun 2022 15:46:57 -0000 1.36 > +++ stand/libsa/exec_i386.c 6 Jul 2022 20:02:13 -0000 > @@ -91,7 +91,7 @@ run_loadfile(uint64_t *marks, int howto) > dev_t bootdev = bootdev_dip->bootdev; > size_t ac = BOOTARG_LEN; > caddr_t av = (caddr_t)BOOTARG_OFF; > - bios_oconsdev_t cd; > + bios_consdev_t cd; > extern int com_speed; /* from bioscons.c */ > extern int com_addr; > bios_ddb_t ddb; > @@ -105,10 +105,10 @@ run_loadfile(uint64_t *marks, int howto) > if (sa_cleanup != NULL) > (*sa_cleanup)(); > > + memset(&cd, 0, sizeof(cd)); > cd.consdev = cn_tab->cn_dev; > cd.conspeed = com_speed; > cd.consaddr = com_addr; > - cd.consfreq = 0; > addbootarg(BOOTARG_CONSDEV, sizeof(cd), &cd); > > if (bootmac != NULL) > Index: stand/pxeboot/conf.c > =================================================================== > RCS file: /cvs/src/sys/arch/amd64/stand/pxeboot/conf.c,v > retrieving revision 1.52 > diff -u -p -r1.52 conf.c > --- stand/pxeboot/conf.c 9 Dec 2020 18:10:18 -0000 1.52 > +++ stand/pxeboot/conf.c 6 Jul 2022 20:02:13 -0000 > @@ -44,7 +44,7 @@ > #include "pxeboot.h" > #include "pxe_net.h" > > -const char version[] = "3.53"; > +const char version[] = "3.54"; > int debug = 0; > > void (*sa_cleanup)(void) = pxe_shutdown; >