On Sun, Oct 08, 2023 at 07:42:54PM +0200, Mark Kettenis wrote:
> Hector Martin has added support for the BCM4388 that is found on the
> last generation of Apple Macs. Based on his commits I've managed to
> get it working on my M2 Pro mini. I still have to clean up some of
> that stuff, but here is a forst batch of two diffs.
>
> The changes to dev/ic/bwfm.c correspond to:
>
> https://github.com/AsahiLinux/linux/commit/81e3cc7bec8b9d9c436f63662d8fcfda4f637807
>
> The changes to dev/pci/if_bwfm_pci.c corrspond to:
>
> https://github.com/AsahiLinux/linux/commit/8190add8671fc49c12d04b5ac8fced70f835e69f
>
> Both changes seem to be a good idea and potentially affect other chips
> as well. So if you have a machine with bwfm(4), please test.
>
> ok?
Hi,
I have an early 2015 MacBookPro that doesn't like this. It fails to load
the firmware even after I deleted it with fw_update -d and readded it.
What results is probably an interrupt storm as the system becomes
unresponsive. Sorry I can't give very much more details.
dmesg follows:
OpenBSD 7.4 (GENERIC.MP) #1396: Sun Oct 8 09:20:40 MDT 2023
[email protected]:/usr/src/sys/arch/amd64/compile/GENERIC.MP
real mem = 17059287040 (16269MB)
avail mem = 16522534912 (15757MB)
random: good seed from bootblocks
mpath0 at root
scsibus0 at mpath0: 256 targets
mainbus0 at root
bios0 at mainbus0: SMBIOS rev. 2.7 @ 0x8afac000 (32 entries)
bios0: vendor Apple Inc. version "186.0.0.0.0" date 06/14/2019
bios0: Apple Inc. MacBookPro12,1
efi0 at bios0: UEFI 1.1
acpi0 at bios0: ACPI 5.0
acpi0: sleep states S0 S3 S4 S5
acpi0: tables DSDT FACP HPET APIC SBST ECDT SSDT SSDT SSDT SSDT SSDT SSDT SSDT
SSDT DMAR MCFG
acpi0: wakeup devices PEG0(S3) EC__(S3) HDEF(S3) RP01(S3) RP02(S3) RP03(S4)
ARPT(S4) RP05(S3) RP06(S3) SPIT(S3) XHC1(S3) ADP1(S3) LID0(S3)
acpitimer0 at acpi0: 3579545 Hz, 24 bits
acpihpet0 at acpi0: 14318179 Hz
acpimadt0 at acpi0 addr 0xfee00000: PC-AT compat
cpu0 at mainbus0: apid 0 (boot processor)
cpu0: Intel(R) Core(TM) i5-5287U CPU @ 2.90GHz, 2800.02 MHz, 06-3d-04, patch
0000002f
cpu0:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,ABM,3DNOWP,PERF,ITSC,FSGSBASE,TSC_ADJUST,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID,RDSEED,ADX,SMAP,PT,SRBDS_CTRL,MD_CLEAR,IBRS,IBPB,STIBP,L1DF,SSBD,SENSOR,ARAT,XSAVEOPT,MELTDOWN
cpu0: 32KB 64b/line 8-way D-cache, 32KB 64b/line 8-way I-cache, 256KB 64b/line
8-way L2 cache, 3MB 64b/line 12-way L3 cache
cpu0: smt 0, core 0, package 0
mtrr: Pentium Pro MTRR support, 10 var ranges, 88 fixed ranges
cpu0: apic clock running at 100MHz
cpu0: mwait min=64, max=64, C-substates=0.2.1.2.4.1.1.1, IBE
cpu1 at mainbus0: apid 2 (application processor)
cpu1: Intel(R) Core(TM) i5-5287U CPU @ 2.90GHz, 2800.05 MHz, 06-3d-04, patch
0000002f
cpu1:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,ABM,3DNOWP,PERF,ITSC,FSGSBASE,TSC_ADJUST,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID,RDSEED,ADX,SMAP,PT,SRBDS_CTRL,MD_CLEAR,IBRS,IBPB,STIBP,L1DF,SSBD,SENSOR,ARAT,XSAVEOPT,MELTDOWN
cpu1: 32KB 64b/line 8-way D-cache, 32KB 64b/line 8-way I-cache, 256KB 64b/line
8-way L2 cache, 3MB 64b/line 12-way L3 cache
cpu1: smt 0, core 1, package 0
cpu2 at mainbus0: apid 1 (application processor)
cpu2: Intel(R) Core(TM) i5-5287U CPU @ 2.90GHz, 2800.07 MHz, 06-3d-04, patch
0000002f
cpu2:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,ABM,3DNOWP,PERF,ITSC,FSGSBASE,TSC_ADJUST,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID,RDSEED,ADX,SMAP,PT,SRBDS_CTRL,MD_CLEAR,IBRS,IBPB,STIBP,L1DF,SSBD,SENSOR,ARAT,XSAVEOPT,MELTDOWN
cpu2: 32KB 64b/line 8-way D-cache, 32KB 64b/line 8-way I-cache, 256KB 64b/line
8-way L2 cache, 3MB 64b/line 12-way L3 cache
cpu2: smt 1, core 0, package 0
cpu3 at mainbus0: apid 3 (application processor)
cpu3: Intel(R) Core(TM) i5-5287U CPU @ 2.90GHz, 2800.07 MHz, 06-3d-04, patch
0000002f
cpu3:
FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CFLUSH,DS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE,SSE3,PCLMUL,DTES64,MWAIT,DS-CPL,VMX,EST,TM2,SSSE3,SDBG,FMA3,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,DEADLINE,AES,XSAVE,AVX,F16C,RDRAND,NXE,PAGE1GB,RDTSCP,LONG,LAHF,ABM,3DNOWP,PERF,ITSC,FSGSBASE,TSC_ADJUST,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID,RDSEED,ADX,SMAP,PT,SRBDS_CTRL,MD_CLEAR,IBRS,IBPB,STIBP,L1DF,SSBD,SENSOR,ARAT,XSAVEOPT,MELTDOWN
cpu3: 32KB 64b/line 8-way D-cache, 32KB 64b/line 8-way I-cache, 256KB 64b/line
8-way L2 cache, 3MB 64b/line 12-way L3 cache
cpu3: smt 1, core 1, package 0
ioapic0 at mainbus0: apid 2 pa 0xfec00000, version 20, 40 pins
acpiec0 at acpi0
acpimcfg0 at acpi0
acpimcfg0: addr 0xe0000000, bus 0-155
acpiprt0 at acpi0: bus 0 (PCI0)
acpiprt1 at acpi0: bus -1 (PEG0)
acpiprt2 at acpi0: bus 1 (RP01)
acpiprt3 at acpi0: bus 2 (RP02)
acpiprt4 at acpi0: bus 3 (RP03)
acpiprt5 at acpi0: bus 5 (RP05)
acpiprt6 at acpi0: bus 4 (RP06)
acpisbs0 at acpi0: SBS0 model "bq20z451" serial 24593 type LION oem "DP"
acpipci0 at acpi0 PCI0: 0x00000004 0x00000011 0x00000001
acpicmos0 at acpi0
asmc0 at acpi0: SMC_ (smc-huronriver) addr 0x300/0x20: rev 2.28f628, 670 keys
"ACPI0008" at acpi0 not configured
"ACPI0001" at acpi0 not configured
"APP000D" at acpi0 not configured
acpiac0 at acpi0: AC unit offline
acpibtn0 at acpi0: LID0(wakeup)
acpibtn1 at acpi0: PWRB
abl0 at acpi0: PNLF (backlight)
acpibtn2 at acpi0: SLPB
acpicpu0 at acpi0: C3(200@530 mwait.1@0x60), C2(200@148 mwait.1@0x33),
C1(1000@1 mwait.1), PSS
acpicpu1 at acpi0: C3(200@530 mwait.1@0x60), C2(200@148 mwait.1@0x33),
C1(1000@1 mwait.1), PSS
acpicpu2 at acpi0: C3(200@530 mwait.1@0x60), C2(200@148 mwait.1@0x33),
C1(1000@1 mwait.1), PSS
acpicpu3 at acpi0: C3(200@530 mwait.1@0x60), C2(200@148 mwait.1@0x33),
C1(1000@1 mwait.1), PSS
acpivideo0 at acpi0: IGPU
acpivout0 at acpivideo0: DD01
cpu0: using VERW MDS workaround (except on vmm entry)
cpu0: Enhanced SpeedStep 2800 MHz: speeds: 2901, 2900, 2800, 2500, 2200, 2000,
1800, 1600, 1400, 1200, 900, 700, 500 MHz
pci0 at mainbus0 bus 0
pchb0 at pci0 dev 0 function 0 "Intel Core 5G Host" rev 0x09
inteldrm0 at pci0 dev 2 function 0 "Intel Iris 6100" rev 0x09
drm0 at inteldrm0
inteldrm0: msi, BROADWELL, gen 8
azalia0 at pci0 dev 3 function 0 "Intel Core 5G HD Audio" rev 0x09: msi
azalia0: No codecs found
xhci0 at pci0 dev 20 function 0 "Intel 9 Series xHCI" rev 0x03: msi, xHCI 1.0
usb0 at xhci0: USB revision 3.0
uhub0 at usb0 configuration 1 interface 0 "Intel xHCI root hub" rev 3.00/1.00
addr 1
"Intel 9 Series DMA" rev 0x03 at pci0 dev 21 function 0 not configured
"Intel 9 Series SPI" rev 0x03 at pci0 dev 21 function 4 not configured
"Intel 9 Series MEI" rev 0x03 at pci0 dev 22 function 0 not configured
azalia1 at pci0 dev 27 function 0 "Intel 9 Series HD Audio" rev 0x03: msi
azalia1: codecs: Cirrus Logic CS4208
audio0 at azalia1
ppb0 at pci0 dev 28 function 0 "Intel 9 Series PCIE" rev 0xe3
pci1 at ppb0 bus 1
ppb1 at pci0 dev 28 function 1 "Intel 9 Series PCIE" rev 0xe3: msi
pci2 at ppb1 bus 2
"Broadcom BCM15700A2" rev 0x00 at pci2 dev 0 function 0 not configured
ppb2 at pci0 dev 28 function 2 "Intel 9 Series PCIE" rev 0xe3: msi
pci3 at ppb2 bus 3
bwfm0 at pci3 dev 0 function 0 "Broadcom BCM43602" rev 0x01: msi
ppb3 at pci0 dev 28 function 4 "Intel 9 Series PCIE" rev 0xe3: msi
pci4 at ppb3 bus 5
ppb4 at pci4 dev 0 function 0 "Intel DSL5520 Thunderbolt" rev 0x00
pci5 at ppb4 bus 6
ppb5 at pci5 dev 0 function 0 "Intel DSL5520 Thunderbolt" rev 0x00: msi
pci6 at ppb5 bus 7
"Intel DSL5520 Thunderbolt" rev 0x00 at pci6 dev 0 function 0 not configured
ppb6 at pci5 dev 3 function 0 "Intel DSL5520 Thunderbolt" rev 0x00: msi
pci7 at ppb6 bus 8
ppb7 at pci5 dev 4 function 0 "Intel DSL5520 Thunderbolt" rev 0x00: msi
pci8 at ppb7 bus 57
ppb8 at pci5 dev 5 function 0 "Intel DSL5520 Thunderbolt" rev 0x00: msi
pci9 at ppb8 bus 58
ppb9 at pci5 dev 6 function 0 "Intel DSL5520 Thunderbolt" rev 0x00: msi
pci10 at ppb9 bus 107
ppb10 at pci0 dev 28 function 5 "Intel 9 Series PCIE" rev 0xe3: msi
pci11 at ppb10 bus 4
ahci0 at pci11 dev 0 function 0 "Samsung SM951 AHCI" rev 0x01: apic 2 int 16,
AHCI 1.3
ahci0: port 0: 6.0Gb/s
scsibus1 at ahci0: 32 targets
sd0 at scsibus1 targ 0 lun 0: <ATA, APPLE SSD SM0512, BXW1> naa.5002538900000000
sd0: 477102MB, 512 bytes/sector, 977105060 sectors, thin
pcib0 at pci0 dev 31 function 0 "Intel 9 Series LPC" rev 0x03
ichiic0 at pci0 dev 31 function 3 "Intel 9 Series SMBus" rev 0x03: apic 2 int 18
iic0 at ichiic0
iic0: addr 0x26 00=01 12=80 16=75 26=0f 29=01 2c=ff 2d=90 2e=f0 2f=9f 31=01
3e=09 3f=1f 42=84 50=03 51=d1 52=26 54=05 58=08 60=88 63=88 f0=03 f1=0a f2=01
f3=84 words 00=0100 01=0000 02=0000 03=0000 04=0000 05=0000 06=0000 07=0000
pchtemp0 at pci0 dev 31 function 6 "Intel 9 Series Thermal" rev 0x03
isa0 at pcib0
isadma0 at isa0
pcppi0 at isa0 port 0x61
spkr0 at pcppi0
vmm0 at mainbus0: VMX/EPT
efifb at mainbus0 not configured
uhidev0 at uhub0 port 3 configuration 1 interface 0 "Broadcom Corp. Bluetooth
USB Host Controller" rev 2.01/1.68 addr 2
uhidev0: iclass 3/1, 1 report id
ukbd0 at uhidev0 reportid 1: 8 variable keys, 6 key codes
wskbd0 at ukbd0: console keyboard
uhidev1 at uhub0 port 3 configuration 1 interface 1 "Broadcom Corp. Bluetooth
USB Host Controller" rev 2.01/1.68 addr 2
uhidev1: iclass 3/1, 2 report ids
ums0 at uhidev1 reportid 2: 3 buttons
wsmouse0 at ums0 mux 0
ugen0 at uhub0 port 3 configuration 1 "Broadcom Corp. Bluetooth USB Host
Controller" rev 2.01/1.68 addr 2
uhidev2 at uhub0 port 5 configuration 1 interface 0 "Apple Inc. Apple Internal
Keyboard / Trackpad" rev 2.00/6.22 addr 3
uhidev2: iclass 3/0, 224 report ids
uhid0 at uhidev2 reportid 224: input=4, output=0, feature=0
uhidev3 at uhub0 port 5 configuration 1 interface 1 "Apple Inc. Apple Internal
Keyboard / Trackpad" rev 2.00/6.22 addr 3
uhidev3: iclass 3/1, 82 report ids
ukbd1 at uhidev3 reportid 1: 8 variable keys, 6 key codes, country code 13
wskbd1 at ukbd1 mux 1
uhid1 at uhidev3 reportid 9: input=0, output=0, feature=3
uhid2 at uhidev3 reportid 63: input=64, output=0, feature=0
ucc0 at uhidev3 reportid 82: 5 usages, 3 keys, enum
wskbd2 at ucc0 mux 1
ubcmtp0 at uhub0 port 5 configuration 1 interface 2 "Apple Inc. Apple Internal
Keyboard / Trackpad" rev 2.00/6.22 addr 3
wsmouse1 at ubcmtp0 mux 0
uhidev4 at uhub0 port 5 configuration 1 interface 3 "Apple Inc. Apple Internal
Keyboard / Trackpad" rev 2.00/6.22 addr 3
uhidev4: iclass 3/0, 83 report ids
uhid3 at uhidev4 reportid 63: input=15, output=0, feature=0
uhid4 at uhidev4 reportid 83: input=0, output=63, feature=0
uhidev5 at uhub0 port 5 configuration 1 interface 4 "Apple Inc. Apple Internal
Keyboard / Trackpad" rev 2.00/6.22 addr 3
uhidev5: iclass 3/0, 192 report ids
uhid5 at uhidev5 reportid 192: input=107, output=0, feature=0
axen0 at uhub0 port 13 configuration 1 interface 0 "D-Link Elec. Corp. D-Link
DUB-1312" rev 3.00/1.00 addr 4
axen0: AX88179, address f4:8c:eb:4b:5d:70
rgephy0 at axen0 phy 3: RTL8169S/8110S/8211 PHY, rev. 5
umass0 at uhub0 port 14 configuration 1 interface 0 "Apple Card Reader" rev
3.00/8.20 addr 5
umass0: using SCSI over Bulk-Only
scsibus2 at umass0: 2 targets, initiator 0
sd1 at scsibus2 targ 1 lun 0: <APPLE, SD Card Reader, 3.00> removable
serial.05ac8406000000000820
vscsi0 at root
scsibus3 at vscsi0: 256 targets
softraid0 at root
scsibus4 at softraid0: 256 targets
root on sd0a (eedf440b3bc0434b.a) swap on sd0b dump on sd0b
WARNING: / was not properly unmounted
inteldrm0: 2560x1600, 32bpp
wsdisplay0 at inteldrm0 mux 1: console (std, vt100 emulation), using wskbd0
wskbd1: connecting to wsdisplay0
wskbd2: connecting to wsdisplay0
wsdisplay0: screen 1-5 added (std, vt100 emulation)
bwfm0: address a0:99:9b:02:c4:e5
Best Regards,
-peter
> Index: dev/ic/bwfm.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/ic/bwfm.c,v
> retrieving revision 1.109
> diff -u -p -r1.109 bwfm.c
> --- dev/ic/bwfm.c 28 Mar 2023 14:01:42 -0000 1.109
> +++ dev/ic/bwfm.c 8 Oct 2023 17:29:35 -0000
> @@ -1089,15 +1089,9 @@ void
> bwfm_chip_ai_reset(struct bwfm_softc *sc, struct bwfm_core *core,
> uint32_t prereset, uint32_t reset, uint32_t postreset)
> {
> - struct bwfm_core *core2 = NULL;
> int i;
>
> - if (core->co_id == BWFM_AGENT_CORE_80211)
> - core2 = bwfm_chip_get_core_idx(sc, BWFM_AGENT_CORE_80211, 1);
> -
> bwfm_chip_ai_disable(sc, core, prereset, reset);
> - if (core2)
> - bwfm_chip_ai_disable(sc, core2, prereset, reset);
>
> for (i = 50; i > 0; i--) {
> if ((sc->sc_buscore_ops->bc_read(sc,
> @@ -1110,32 +1104,12 @@ bwfm_chip_ai_reset(struct bwfm_softc *sc
> }
> if (i == 0)
> printf("%s: timeout on core reset\n", DEVNAME(sc));
> - if (core2) {
> - for (i = 50; i > 0; i--) {
> - if ((sc->sc_buscore_ops->bc_read(sc,
> - core2->co_wrapbase + BWFM_AGENT_RESET_CTL) &
> - BWFM_AGENT_RESET_CTL_RESET) == 0)
> - break;
> - sc->sc_buscore_ops->bc_write(sc,
> - core2->co_wrapbase + BWFM_AGENT_RESET_CTL, 0);
> - delay(60);
> - }
> - if (i == 0)
> - printf("%s: timeout on core reset\n", DEVNAME(sc));
> - }
>
> sc->sc_buscore_ops->bc_write(sc,
> core->co_wrapbase + BWFM_AGENT_IOCTL,
> postreset | BWFM_AGENT_IOCTL_CLK);
> sc->sc_buscore_ops->bc_read(sc,
> core->co_wrapbase + BWFM_AGENT_IOCTL);
> - if (core2) {
> - sc->sc_buscore_ops->bc_write(sc,
> - core2->co_wrapbase + BWFM_AGENT_IOCTL,
> - postreset | BWFM_AGENT_IOCTL_CLK);
> - sc->sc_buscore_ops->bc_read(sc,
> - core2->co_wrapbase + BWFM_AGENT_IOCTL);
> - }
> }
>
> void
> @@ -1338,6 +1312,7 @@ bwfm_chip_ca7_set_passive(struct bwfm_so
> {
> struct bwfm_core *core;
> uint32_t val;
> + int i = 0;
>
> core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7);
> val = sc->sc_buscore_ops->bc_read(sc,
> @@ -1347,10 +1322,11 @@ bwfm_chip_ca7_set_passive(struct bwfm_so
> BWFM_AGENT_IOCTL_ARMCR4_CPUHALT,
> BWFM_AGENT_IOCTL_ARMCR4_CPUHALT);
>
> - core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_80211);
> - sc->sc_chip.ch_core_reset(sc, core, BWFM_AGENT_D11_IOCTL_PHYRESET |
> - BWFM_AGENT_D11_IOCTL_PHYCLOCKEN, BWFM_AGENT_D11_IOCTL_PHYCLOCKEN,
> - BWFM_AGENT_D11_IOCTL_PHYCLOCKEN);
> + while ((core = bwfm_chip_get_core_idx(sc, BWFM_AGENT_CORE_80211, i++)))
> + sc->sc_chip.ch_core_disable(sc, core,
> + BWFM_AGENT_D11_IOCTL_PHYRESET |
> + BWFM_AGENT_D11_IOCTL_PHYCLOCKEN,
> + BWFM_AGENT_D11_IOCTL_PHYCLOCKEN);
> }
>
> int
> Index: dev/pci/if_bwfm_pci.c
> ===================================================================
> RCS file: /cvs/src/sys/dev/pci/if_bwfm_pci.c,v
> retrieving revision 1.75
> diff -u -p -r1.75 if_bwfm_pci.c
> --- dev/pci/if_bwfm_pci.c 30 Dec 2022 14:10:17 -0000 1.75
> +++ dev/pci/if_bwfm_pci.c 8 Oct 2023 17:29:35 -0000
> @@ -134,6 +134,10 @@ struct bwfm_pci_softc {
> bus_space_handle_t sc_reg_ioh;
> bus_size_t sc_reg_ios;
>
> + bus_space_tag_t sc_pcie_iot;
> + bus_space_handle_t sc_pcie_ioh;
> + bus_size_t sc_pcie_ios;
> +
> bus_space_tag_t sc_tcm_iot;
> bus_space_handle_t sc_tcm_ioh;
> bus_size_t sc_tcm_ios;
> @@ -379,6 +383,10 @@ bwfm_pci_attach(struct device *parent, s
> goto bar1;
> }
>
> + sc->sc_pcie_iot = sc->sc_reg_iot;
> + bus_space_subregion(sc->sc_reg_iot, sc->sc_reg_ioh, 0x2000,
> + sc->sc_reg_ios - 0x2000, &sc->sc_pcie_ioh);
> +
> sc->sc_pc = pa->pa_pc;
> sc->sc_tag = pa->pa_tag;
> sc->sc_id = pa->pa_id;
> @@ -458,11 +466,11 @@ bwfm_pci_preinit(struct bwfm_softc *bwfm
> #endif
>
> bwfm_pci_select_core(sc, BWFM_AGENT_CORE_PCIE2);
> - bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + bus_space_write_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_PCIE2REG_CONFIGADDR, 0x4e0);
> - reg = bus_space_read_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + reg = bus_space_read_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_PCIE2REG_CONFIGDATA);
> - bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + bus_space_write_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_PCIE2REG_CONFIGDATA, reg);
>
> switch (bwfm->sc_chip.ch_chip) {
> @@ -1438,10 +1446,10 @@ bwfm_pci_ring_bell(struct bwfm_pci_softc
> struct bwfm_pci_msgring *ring)
> {
> if (sc->sc_shared_flags & BWFM_SHARED_INFO_SHARED_DAR)
> - bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + bus_space_write_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_64_PCIE2REG_H2D_MAILBOX_0, 1);
> else
> - bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + bus_space_write_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_PCIE2REG_H2D_MAILBOX_0, 1);
> }
>
> @@ -1889,13 +1897,13 @@ bwfm_pci_buscore_reset(struct bwfm_softc
> };
>
> for (i = 0; i < nitems(cfg_offset); i++) {
> - bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + bus_space_write_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_PCIE2REG_CONFIGADDR, cfg_offset[i]);
> - reg = bus_space_read_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + reg = bus_space_read_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_PCIE2REG_CONFIGDATA);
> DPRINTFN(3, ("%s: config offset 0x%04x, value 0x%04x\n",
> DEVNAME(sc), cfg_offset[i], reg));
> - bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + bus_space_write_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_PCIE2REG_CONFIGDATA, reg);
> }
> }
> @@ -2389,11 +2397,11 @@ void
> bwfm_pci_intr_enable(struct bwfm_pci_softc *sc)
> {
> if (sc->sc_pcireg64)
> - bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + bus_space_write_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_64_PCIE2REG_MAILBOXMASK,
> BWFM_PCI_64_PCIE2REG_MAILBOXMASK_INT_D2H_DB);
> else
> - bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + bus_space_write_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_PCIE2REG_MAILBOXMASK,
> BWFM_PCI_PCIE2REG_MAILBOXMASK_INT_FN0_0 |
> BWFM_PCI_PCIE2REG_MAILBOXMASK_INT_FN0_1 |
> @@ -2404,10 +2412,10 @@ void
> bwfm_pci_intr_disable(struct bwfm_pci_softc *sc)
> {
> if (sc->sc_pcireg64)
> - bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + bus_space_write_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_64_PCIE2REG_MAILBOXMASK, 0);
> else
> - bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + bus_space_write_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_PCIE2REG_MAILBOXMASK, 0);
> }
>
> @@ -2415,10 +2423,10 @@ uint32_t
> bwfm_pci_intr_status(struct bwfm_pci_softc *sc)
> {
> if (sc->sc_pcireg64)
> - return bus_space_read_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + return bus_space_read_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_64_PCIE2REG_MAILBOXINT);
> else
> - return bus_space_read_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + return bus_space_read_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_PCIE2REG_MAILBOXINT);
> }
>
> @@ -2426,10 +2434,10 @@ void
> bwfm_pci_intr_ack(struct bwfm_pci_softc *sc, uint32_t status)
> {
> if (sc->sc_pcireg64)
> - bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + bus_space_write_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_64_PCIE2REG_MAILBOXINT, status);
> else
> - bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + bus_space_write_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_PCIE2REG_MAILBOXINT, status);
> }
>
> @@ -2437,10 +2445,10 @@ uint32_t
> bwfm_pci_intmask(struct bwfm_pci_softc *sc)
> {
> if (sc->sc_pcireg64)
> - return bus_space_read_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + return bus_space_read_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_64_PCIE2REG_INTMASK);
> else
> - return bus_space_read_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + return bus_space_read_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_PCIE2REG_INTMASK);
> }
>
> @@ -2451,10 +2459,10 @@ bwfm_pci_hostready(struct bwfm_pci_softc
> return;
>
> if (sc->sc_shared_flags & BWFM_SHARED_INFO_SHARED_DAR)
> - bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + bus_space_write_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_64_PCIE2REG_H2D_MAILBOX_1, 1);
> else
> - bus_space_write_4(sc->sc_reg_iot, sc->sc_reg_ioh,
> + bus_space_write_4(sc->sc_pcie_iot, sc->sc_pcie_ioh,
> BWFM_PCI_PCIE2REG_H2D_MAILBOX_1, 1);
> }
>
>
--
Over thirty years experience on Unix-like Operating Systems starting with QNX.
