Sorry Bill. I don't know what to tell you. I'm not too surprised that you weren't able to import into the synced gate, but, yeah, I'd have thought you'd been able to import into 5386.
Bill Holler wrote: > Hi, > > I am unable to "hg import" the cstate.diff file Aubrey sent me. > Aubrey created this file with "hg export" in his gate which was based > on changeset 5386:4fccf184d4a7 + his new bits. This changeset > 5386 was the cpupm-gate before the 84 merge. > > "hg import" failed to import this changeset into a post-merge > cpupm-gate. I assume the "Hunk #1 FAILED at 41" messages > hg import barfed out are due to a merge conflict??? > > I thought it would be easier to import Aubrey's change into a pre-84 > cpupm-gate, and then merge that into the post-84 cpupm-gate. > I did a "hg clone -r 5386: ..." to get a 5386 changeset. > "hg log -l 1" in this new clone shows it is the 5386 changeset. > Aubrey's diff should import without a problem now as there are > NO merge conflicts. However import fails with the message below. > > Any suggestions what I should do? I want to resolve this with > Mercurial. However if I cannot figure out how to do this "the hg > way" soon, I will just hand merge these changes into a 84 based > cpupm-gate. > > Regards, > Bill > > > sailcat% hg log -l 1 > changeset: 5386:4fccf184d4a7 > tag: tip > user: Aubrey Li <aubrey.li at intel.com> > date: Sun Feb 17 23:42:27 2008 +0800 > summary: caches should maintain coherency in C3. > > sailcat% ls ~/Intel/tesla/cpudrv > cstate.diff > sailcat% hg import ~/Intel/tesla/cpudrv/cstate.diff > applying /home/bholler/Intel/tesla/cpudrv/cstate.diff > usr/src/uts/i86pc/io/cpu_idle.c > Hunk #1 FAILED at 41. > Hunk #2 FAILED at 75. > Hunk #3 FAILED at 95. > Hunk #4 FAILED at 141. > Hunk #5 FAILED at 219. > 5 out of 5 hunks FAILED -- saving rejects to file > usr/src/uts/i86pc/io/cpu_idle.c.rej > usr/src/uts/i86pc/os/mp_machdep.c > Hunk #1 FAILED at 79. > Hunk #2 FAILED at 433. > Hunk #3 FAILED at 568. > Hunk #4 FAILED at 592. > 4 out of 4 hunks FAILED -- saving rejects to file > usr/src/uts/i86pc/os/mp_machdep.c.rej > usr/src/uts/i86pc/os/mp_pc.c > Hunk #1 FAILED at 258. > 1 out of 1 hunk FAILED -- saving rejects to file > usr/src/uts/i86pc/os/mp_pc.c.rej > usr/src/uts/i86pc/sys/cpu_idle.h > Hunk #1 FAILED at 42. > 1 out of 1 hunk FAILED -- saving rejects to file > usr/src/uts/i86pc/sys/cpu_idle.h.rej > abort: patch command failed: exited with status 1 > > > > Li, Aubrey wrote: >> changelog: >> 1) the way to place processor into deep cstate is determined by >> register address space id, instead by mwait feature. >> 2) export cpu_wakeup and cpu_mwait_wakeup, so that disp_enq_thread >> can be assigned on the fly. >> >> io/cpu_idle.c | 58 >> ++++++++++++++++++++++++++++++++++++-------------------- >> os/mp_machdep.c | 12 +++++------ >> os/mp_pc.c | 4 +-- >> sys/cpu_idle.h | 4 ++- >> 4 files changed, 49 insertions(+), 29 deletions(-) >> >> Thanks, >> -Aubrey >> _______________________________________________ >> tesla-dev mailing list >> tesla-dev at opensolaris.org >> http://mail.opensolaris.org/mailman/listinfo/tesla-dev >> > > _______________________________________________ > tesla-dev mailing list > tesla-dev at opensolaris.org > http://mail.opensolaris.org/mailman/listinfo/tesla-dev
