http://defect.opensolaris.org/bz/show_bug.cgi?id=6068
Aubrey.Li <aubrey.li at intel.com> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |aubrey.li at intel.com
Status|NEW |ACCEPTED
--- Comment #2 from Aubrey.Li <aubrey.li at intel.com> 2009-01-09 19:37:36 ---
It should be PDC setting error.
Try this patch:
cpupm_intel_pdccap = CPUPM_INTEL_PDC_MP;
if (speedstep_supported(family, model)) {
mach_state->ms_pstate.cma_ops = &speedstep_ops;
--- cpupm_intel_pdccap = CPUPM_INTEL_PDC_PS_MSR |
+++ cpupm_intel_pdccap |= CPUPM_INTEL_PDC_PS_MSR |
CPUPM_INTEL_PDC_C1_HALT | CPUPM_INTEL_PDC_PSD;
} else {
mach_state->ms_pstate.cma_ops = NULL;
}
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