Liu, Jiang wrote: > Li, Aubrey <> wrote: > >> Bill.Holler wrote: >> >> >>>> Oh, oh..., that's right, we should use TSC. >>>> But since we will support platform on which TSC is not reliable in >>>> deep c-state, I suggest we use PM timer to make code a bit easier to >>>> readable, :- >>>> >>> Do you recommend the HPET timer or the ACPI PM timer as a >>> reliable timer? We are currently investigating the HPET timer. >>> >>> >> ACPI PM timer is already supported in the ACPICA. >> Take a look at $(SRC)/uts/intel/io/acpica/hardware/hwtimer.c >> PM timer is recommended in ACPI spec for deep c-state. >> But I think both can be used as a reliable source. >> > > If so, PM timer should be a better choice because it's more standardized > than HPET and PM timer with 250 precision should be enough for C-state. >
The ACPI PM timer interface looks very simple. :-) hwtimer.c indicates the ACPI PM timer is either 24 or 32-bits. Comments indicate 24-bit timers roll-over in about 4.66 seconds and 32-bit timers roll-over in about 19.88 minutes. That will be an upper bounds on how long a cpu can be idle if this timer is used for measuring the idle time. If we do a good job with the power aware dispatcher and callout/cyclic work, possible cpu idle time will be un-bounded at least on some cpus. ;-) Bill
