Arnold: How are you progressing on your counter design? Would be best to take this discussion off-list. Advise your email address;
Tom [EMAIL PROTECTED] At 02:09 PM 10/16/2005, you wrote: >Hi Tom, >I am very much interested on your works and results, it sounds to >be a interesting way, nice project. Unfortunately I do understand >nothing of these new devices. >I would like to keep in touch with you, thank you. ON 16 OCT TOM BUEHL WROTE: Arnold: Some more info regarding use of Xilinx FPGA for counting. I recently completed a design using Xilinx Spartan II FPGA. This FPGA is only specified for maximum 200 MHz internal clock. My skills in this area are very limited, and this is my first for FPGA design. When finished, it counted reliably to above 210 MHz. Input pulses about 2 nS wide. So the performance of the Xilinx parts are excellent. This was a pre-set counter: Enter desired count number into registers/ memory, and the counter would output pulse when this count finished. Counting could be triggered or could automatically begin again. Therefore the OUTPUT could be every 10 pulses, up to every 999,999,999 pulses, with resolution of 1 pulse. Although this was not interfaced with time reference, circuit could be modified to compare with a reference. I have a plan to do the next one with higher speed Xilinx, and also know how I will be able to get counting at twice the internal clock rate of the FPGA. This would make the FPGA with minor additional circuitry able to count at greater than 500 MHz. Just as other time_nuts cautioned, the problem is handling the input signals at this frequency. Even at the 200 MHz rate, the very high transition time of the input pulses required that the circuit be "clean" at 1 GHz. You really need to design the input circuit first, so that the input signal is properly "conditioned" to provide clean data pulses to the FPGA. This was my biggest mistake on the first design. The FPGA counted fine if driven directly from a generator, but amplifying the input signals to adjust gain and trigger threshold was a VERY big design task. As you preceed, I would be glad to give you my comments on your work. Regards, Tom Buehl [EMAIL PROTECTED] _______________________________________________ time-nuts mailing list time-nuts@febo.com https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts