Bruce, Can you describe further your idea about phase detection using an ADC.
Who produces the sinewave from the filtered counter? (Thinking out loud) Using a 10MHz oscillator as an example: Is this dividing the clock down to (say) 1 MHz and using a square->sine conversion then sampling the phase angle at the 1PPS transition? The accuracy of square->sine conversion appears as another source of error. Perhaps the MAX9382 (http://www.maxim-ic.com/appnotes.cfm/appnote_number/1130) could help with the problem of locking to the undesired harmonic. Jack -----Original Message----- From: [EMAIL PROTECTED] [mailto:[EMAIL PROTECTED] On Behalf Of Dr Bruce Griffiths Sent: Wednesday, December 13, 2006 7:52 PM To: Discussion of precise time and frequency measurement Subject: Re: [time-nuts] LPRO-101 with Brooks Shera's GPS locking circuit The Brooks Shera circuit relies on the 24 MHz oscillator not being locked to the OCXO or the PPS signal so that (in the absence of injection locking) averaging the measured time interval gives an unbiased estimate of the true value. Using a higher speed oscillator to measure the time interval would be advantageous with the more accurate GPS timing receivers currently available. If you have an M12+ or MTM timing receiver and a rubidium oscillator the Brooks Shera technique is not optimum you can easily achieve a performance that is 1-2 orders of magnitude better with a less complex phase detector. The Brooks Shera circuit has a single shot resolution of 41.6 nanosec which may be up to 10 times worse than the jitter in the PPS output of a good timing receiver (after correcting for any sawtooth error - in software of course, to avoid any additional noise and errors caused by hardware correction). The phase detector method employed is the digital equivalent of a classical sampling phase detector with a linear phase detection characteristic. A phase lock loop employing a sampling phase detector will lock to a harmonic of the sampling frequency, which in this case is 1Hz. It is therefore necessary to divide down the OCXO (or other high stability oscillator) frequency to a value such that the efc tuning range of the oscillator precludes locking to the undesired harmonic. Unfortunately a phase detector with a linear characteristic can sometimes allow the phase lock loop to lock to a frequency which is not a harmonic of the sampling frequency (in this case frequencies like 17/13, 12/11 Hz etc.). A phase detector with a sinusoidal characteristic (such as an ADC sampling a sinewave produced by filtering the output of a counter clocked by the OCXO) avoids the problem of non harmonic locking and eliminates most of the digital circuitry. A loop time constant of around 120 seconds is far too short for obtaining the optimum performance from a good rubidium standard, as the loop will degrade the rubidium standard to an accuracy of around 35E-10 (with a 41.6ns single shot measurement resolution) when a good rubidium standard is capable of a considerably higher stability than this. Bruce _______________________________________________ time-nuts mailing list [email protected] https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts _______________________________________________ time-nuts mailing list [email protected] https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
