Darn, the table is a mess. Here is the corrected one: LVPECL Outputs Hz dBc/Hz 1 ? 10 -127 100 -145 1k -153 10k -158 100k -158 1M -158
10MHz OCXO Hz dBc/Hz 1 -100 10 -130 100 -152 1k -160 10k -165 100k -165 1M -165 10x Multiplied Hz dBc/Hz 1 -80 10 -110 100 -132 1k -140 10k -145 100k -145 1M -145 Diverence between 10MHz x10 Multiplied and AD9512 Hz dBc/Hz 1 17 10 13 100 13 1k 13 10k 13 100k 13 1M 13 Regards, Stephan. On 3/1/07, [EMAIL PROTECTED] <[EMAIL PROTECTED]> wrote: > > In a message dated 3/1/2007 05:50:30 Pacific Standard Time, > [EMAIL PROTECTED] writes: > > Hi Said, > > It seems there are indeed many ways to kill a cat. What happens to the > close-in phase noise using this method? > > Cheers, > > Stephan. > > > > Hi Stephan, > > you are asking the right questions :) > > The near-carrier phase noise depends on the 1GHz reference source: > > 1) If it is a crystal such as the Xpresso 1GHz series from Fox, then the > phase noise of the 1GHz reference will actually be reduced by 20dB for every > 1:10 reduction in output frequency! > > 2) If you are using a standard (noisy) VCO, then the phase noise of your > 10MHz reference source will be increased (multiplied) by the standard 20dB > for every 10x increase in output frequency. > > This is due to the fact that when using a VCO, the PLL will use the > reference crystal to actually reduce the phase noise of the VCO. You will > likely use > a loop filter with 1 - 15KHz BW. So you get the 10MHz reference noise > multiplication inside this loop filter BW. Outside the BW, it's the DACs and > VCO's > noise floor. > > But for a crystal 1GHz reference, you would use a simple PLL with an > extremely small loop filter BW (say <1Hz) so that your total phase noise is > only > dependent on the 1GHz crystal reference, and not at all on your 10MHz > reference > anymore. The PLL could be as simple as an Exor gate in this case. > > I have been trying to get phase noise/jitter specs from Fox for their new > 1GHz Xpresso crystals, but it is hard to come by. I am waiting for feedback > from them. They only specify "UI"!? > > But let's say these are as good as advertised, and for me that would mean > say better than -95dBc/Hz at 10Hz offset from 1GHz carrier, then by reduction > through the DDS, we would theoretically get -20dB below this, or -115dBc/Hz at > 100MHz output. > > I would assume that at that point the noise floor of the DDS DAC chip is the > limiting factor at <-150dBc/Hz as it is for the well-known AD9858 chip (it > actually measures about -155dBc/Hz). > > AD has new chips coming this month, see for example the AD9957 with a 14 bit > DAC (9858 has 10 bits), I assume these will have an even lower phase noise > floor and very important lower spurs than the AD9858, the datasheet says TBD: > > _http://www.analog.com/UploadedFiles/Data_Sheets/AD9957.pdf_ > (http://www.analog.com/UploadedFiles/Data_Sheets/AD9957.pdf) > > Bye, > Said > > > > > > > > > > <BR><BR><BR>**************************************<BR> AOL now offers free > email to everyone. Find out more about what's free from AOL at > http://www.aol.com. > _______________________________________________ > time-nuts mailing list > [email protected] > https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > _______________________________________________ time-nuts mailing list [email protected] https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
