> You need to have a two stage register, allowing one clock period for > the first stage to come out of metastability. This of course delays > the signal to be synchronized by a clock period.
Yup. The delay is unavoidable. The only thing you can do is trade off delay vs MTBF. > In an attempt to get around this delay, you sometimes see a series of > registers in cascade clocked at slightly different times in an attempt > to solve metastability w/o giving up a clock period. This is unlikely > to work well. You need one long settling period, not a bunch of short > ones. That's an example of the sort of bogus kludge I mentioned. Consider a chain of 3 FFs where the clock for the middle one is in between the other two clocks. Compare that to the same setup without the middle FF. In the first case, you have clock-out, setup, clock-out, and setup that gets subtracted off from the settling time. In the second case, you have clock-out and setup that gets subtracted. The extra setup/clock-out from the middle FF is reducing the settling time. Settling time is an exponential. It's almost always wrong put anything in that path. It's not the number of FFs, it's the settling time that's important, or sum of settling times. -- These are my opinions, not necessarily my employer's. I hate spam. _______________________________________________ time-nuts mailing list [email protected] https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts
