Hi Said, Yes, I could see that my idea would suffer from this hunting in the locked state problem an was wondering if this could be perhaps 'cured' with a simple low-pass filter stage between the count up/down DAC and the EFC, IE, the DAC would hunt up and down with a duty cycle equal to the difference between the two DAC levels filtered by the LPF, thereby giving a constant frequency.
This, of course, would further exasperate any problems trying to lock a fast moving oxco or achieving lock in the first place. Some tuning of the LPF time constant would be required to stop ringing as the PLL moved into lock. Do you think that would work as it would probably be easier to implement than something to implement a dead-zone? As for achieving lock in the first place with this idea, I'm thinking now that it could take a very lon time for the DAC to count up/down with output from a phase detector at 1PPS. I was really only thinking about this whole idea as it seemed to be a natural to hold the EFC voltage during lack of PPS if the GPS goes down. Without the PPS, the phase detector will output no pulses so the DAC would remain frozen in it's last state. Implementing a GPSDO via a phase detector followed by a LPF would obviously be easier but in the absence of the PPS, I imagine that leakage in the circuit would make the EFC voltage drift. I guess I could buffer it with a source-follower or something like that, or perhaps some form of sample and hokld circuit. I was just bouncing around ideas as I know there are a lot of great brains on this list. 73, Steve 2008/12/31 <[email protected]>: > Hi Steve, > > I played with such a circuit a long time ago. > > The slope is limited to the clocking of your circuit (one LSB digit per > clock typ), which can present an issue if you cannot follow the OCXO's EFC > changes fast enough. You could be chasing the OCXO voltage and this may lead > to > instability. > > Even if it is "locked", the circuit will constantly be "chasing" the OCXO, > unless you implement a dead-zone where the circuit stops counting up/down when > you are close enough to your target frequency. > > This chasing may cause the frequency to modulate up and down, and could lead > to large-scale oscillations. > > Tough to get this to work properly, but with circuitry to add a deadzone, > and to dampen the lock, and maybe to introduce gain (jump more than one LSB > when > far off etc) it may work. Then again implementing a standard PI controller > (in a micro etc), and calculating it's stability etc is much easier than > getting this to work properly. > > bye, > Said > > > In a message dated 12/29/2008 21:30:54 Pacific Standard Time, > [email protected] writes: > > As part of the current idea I have with the hockey-pucks, I'm thinking > about feeding the D1 and U1 phase difference pulses out of an MC4044 > out to some circuit that could clock up and down an analog output > which would ultimately go to the EFC of a ocxo, IE D1 pulses when the > phase of one input signal is advanced and visa versa for the U1 pin. > Anyone seen a circuit like that please? > > Thanks & 73, Steve > -- > Steve Rooke - ZL3TUV & G8KVD & JAKDTTNW > Omnium finis imminet > > _______________________________________________ > time-nuts mailing list -- [email protected] > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > > > _______________________________________________ > time-nuts mailing list -- [email protected] > To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts > and follow the instructions there. > -- Steve Rooke - ZL3TUV & G8KVD & JAKDTTNW Omnium finis imminet _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
