Bruce wrote: A little more detail is required such as: 1) What was the divided down output of the 74AC163 compared with?
The E5052B contains 2 uncorrelated test systems, and uses its 2 internal synthesisers (with separate 10MHz ref OCXOs) as references. The signal under test is split at the input, and cross-correlation is used to reduce the effect of reference noise. 2) An image of the breadboard would also be useful. It was 2 years ago, and it doesn't exist any more! The IC was an SO-16 package, stuck upside down to a piece of copper-clad board. 3) A circuit diagram showing component values and manufacturer's part nos. Circuit attached. I don't remember the supply filter resistor value, but it was probably ~100R. I adjusted the supply to give 5V on the IC when it was operating. I've read the E5052B manual but there's insufficient detail to have confidence in the calibration technique used when a square wave input is used. The E5052B doesn't tune the DUT, but digitally locks its synthesisers to the signal, so there is no VCO constant to calibrate. It uses analogue mixers as phase detectors. I assume it measures the slope at zero crossing as it appears able to work with high harmonic levels, e.g. passing undistorted signals through amplifiers driven into compression and re-measuring doesn't change the measured close-in phase noise (in the 1/f^3 region). Below 100Hz where the oscillator's phase noise dominates, the 12.5MHz curve tracks it 18dB lower, which gives confidence that the instrument has got the calibration right. >From what I understand from the manual / various application notes, the E5052B samples the baseband signal at 250MHz, and processes the whole thing in a single band. (This is how it achieves such good far-from-carrier performance. In the time it takes to do a single measurement at 1Hz offset for example, it does 128000 correlations at >6.25MHz, giving 25.5dB improvement.) From this, I think one can assume that if the cal is valid close-in, it will be valid at all offsets. I would be interested in any suggestions about possible measurement errors. The instrument settings are shown on the plot I posted yesterday. In theory, 74AC phase noise should tend to a very low value as f tends to zero, assuming the power supply is quiet, as one is just left with FETs with a low ON resistance. Garry Pascall Electronics Ltd - Registered in England No: 1316674 VAT Registration No: GB 448705134 Registered Office: Brunswick Road, Cobbs Wood, Ashford, Kent, TN23 1EH The transfer of any controlled technology contained in or attached to this email is covered by the "Open General Export Licence (Technology for Military Goods)", granted by the United Kingdom Secretary of State. The information contained in this email is provided as a personal communication of the sender and, as such, is not binding on Pascall Electronics Ltd. unless the intended recipient has been notified by signed postal or fax communication that the sender is authorised to commit Pascall Electronics Ltd. on the subject matter concerned.The contents of this email are confidential to the intended recipient at the email address to which it has been addressed. It may not be disclosed to or used by anyone other than this addressee, nor may it be copied in any way. If received in error, please contact Oli Poole, at [email protected], quoting the name of the sender and the addressee and then delete it from your system.
74AC163 test circuit.pdf
Description: 74AC163 test circuit.pdf
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