On 03/17/2012 11:40 PM, Chuck Forsberg WA7KGX N2469R wrote:
I wonder if a GPSDO could be built around these chips.

Locking it up to a 10 MHz seems doable, you need to use the fractional division, but you can make it spot on if my back-of-the-envelope analysis is correct.

You will have to implement the GPS receiver. You could do SDR, but I would toss a FPGA in for the digital correlator frontend stuff and then let the CPU do the rest.

It's a good pair of chips to create some fun. :)

It will give you L1, but not L2 or L5.

Cheers,
Magnus

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