On 18/01/14 04:09, Jim Lux wrote:
On 1/17/14 11:35 AM, Magnus Danielson wrote:
On 2014-01-16 20:29, Hal Murray wrote:
[email protected] said:
The real benefit of dual-frequency is you can do post-processing with
PPP.
Javad has some modules but they start at 3 kUSD - if anyone knows of
hobby
level priced L1/L2 receivers that can produce rinex-files for PPP
processing
that would be interesting!
Has anybody considered doing it in software?
If I wanted to play with that sort of stuff, is there any particular SDR
hardware package/project that would good to start with?
Well, considering that you will need to get the P(Y) signal at 10,23
Mchip/s on both L1 and L2, requiring say 40 Msamples/s for both
frequencies, and that you will need to do it for say 12 channeles and a
bit of interesting processing beyond doing the same amount of channels
for the C/A code, it will be an interesting challenge to do that in CPU
code, rather than doing the "baseband-processing" in some form of
hardware/FPGA.
ALmost certainly in an FPGA. But unless you want fast acquisition,
implementing the tracking loop and despreading in FPGA isn't
mindbendingly difficult. I'll bet there's open source out there.
Doing it in FPGA isn't all that hard. You build a C/A receiver and then
extend it, as you do hand-over from C/A to L1 P(Y) and then lock up on
the L2 P(Y). FFT accelerated C/A lockup will benefit also for P(Y) as
you get a head-start with C/A and then it is relatively trivial to take
the next step. It's this dependence of C/A which makes it OKish from a
military standpoint, as the C/A is fairly trivial to jam.
You could also record raw bits and decode off line in software in
non-real time, as long as your clock that you timestamp with isn't too bad.
Indeed. Been there and done that for L1 C/A. If your time-stamps is off,
your solution will tell you how of they are.
Cheers,
Magnus
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