If I were to try to do this automatically, I think I'd move the PLL set point in "n" steps from near the bottom to near the top and look at the width of the PPS signal at each step; perhaps using the bucket scheme that Stanley mentioned and using some count per bucket to decide "how wide is wide". I don't have any sort of phase wrapping code, though, so I have to be careful how close to a phase point I get.
Bob >________________________________ > From: Chris Albertson <[email protected]> >To: Bob Stewart <[email protected]>; Discussion of precise time and frequency >measurement <[email protected]> >Sent: Wednesday, March 26, 2014 11:25 AM >Subject: Re: [time-nuts] RC TIC linearity correction? > > > > > > > > >On Wed, Mar 26, 2014 at 8:41 AM, Bob Stewart <[email protected]> wrote: > >Thanks Charles. That makes sense, but at the expense of adding unwanted >complexity. As I've been moving the setpoint around this morning, I think I >see a way to characterize what it's doing. Maybe I can come up with a small >correction table or formula that's good enough for my purposes. >> > > >Yes a lookup table would be easy. But how to create the table? I've been >thinking about a way to do self calibration. The controller purposely runs >the DAC and of course the OCXO through some range and watches the phase. This >gives you a rough DAC vs. Phase function. Re-running the calibration could >make up for some component aging. It would take some time (hours) to wait >for everything to warm up and then you'd have to move the EFV voltage slowly > > > > > >-- > >Chris Albertson >Redondo Beach, California > > _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to https://www.febo.com/cgi-bin/mailman/listinfo/time-nuts and follow the instructions there.
