Hi Anders,
On 2019-02-18 14:47, Anders Wallin wrote:
Hi all,
We've tried to measure the 1e9/2**48 = 3.55uHz frequency resolution of an
AD9912 DDS (clocked at 1GHz SYSCLK), but found that the output corresponds
to an FTW with the LSB set to zero.
Results around 10MHz output, where we expect a step of 3.55 uHz for each
step of the FTW, but instead see a step of 7.1 uHz every second step.
https://drive.google.com/file/d/1U5nbg2RSOpVRa8VLOJ6bCWsyihcSBhBZ/view
https://drive.google.com/file/d/1c6CoQIWzRoM4y8CLoRLhi7sh2pMCywwo/view
has anyone else worked a lot with the AD9912 and verified the frequency
resolution?
(I can describe the setup&measurement more in detail, but we believe we
know roughly what we are doing and tried this with two different AD9912
boards and two different measurement systems)
OK, I agree that it looks like you loose the LSB. You know what you are
doing for the measurement of frequency, so for the moment I'll assume
that this is not where you got your error.
Now, how did you set the DDS up? Have you checked that the actually
written registers had the setting stepped?
Did you used some finished code? Did you write your own? Have you read
out and verified the bit positions? Have you checked all other setup bits?
I'll happily help verifying the setup part.
Cheers,
Magnus
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