Gerhard I sent this privately but it bounced,
I am very interested in your board. Will you have them available for purchase?
I have an MV89 I would like to power up and use.
Wes N7WS
On 5/25/2019 8:14 AM, Gerhard Hoffmann wrote:
Am 25.05.19 um 02:51 schrieb life speed via time-nuts:
Hi all, it's been a while since I visited. I am venturing into an unfamiliar
area from my usual low phase noise PLL, OCXO and microwave synthesizer design
endeavors.
I recall there are some knowledgeable, well, time nuts on this list and hope
you'll indulge some questions and maybe direct me to some appropriate white
papers and share insights.
I want to discipline a 10 MHz OCXO with 1PPS from GPS. Obviously not an
unusual application, but I need to understand the methodology as I will not be
buying a module but rather implementing the design with an FPGA, off-the-shelf
GPS chip and a high-quality 10MHz DOCXO.
One of the first questions I have: is it possible to implement phase-lock
with a narrow digital PLL and DSP integrator/filter in the FPGA? I suspect
some 1PPS disiplined OCXO implementations are merely controlled to the same
frequency, but not necessarily the same phase, depending on the details of the
implementation.
I need the output of two of these units I design to have to be phase coherent
relative to each other. Your knowledge, experience and scholarly references
are welcome.
Thanks,
Lifespeed
Hi,
I have a new release of my OCXO support board on the backburner.
it will provide
-a home for HP10811A, MTI-260, Morion MV89, a 100 MHz SC cut oven (Digikey
XC2265-ND) and some others.
- Locking on incoming 10 MHz,
- Locking on incoming 1pps
- free running adjusted from 10 turn pot
- generation of 1pps from onboard oscillator
- frequency doubler 5 to 10 MHz (or undoubled, or other frequencies)
- dBm measurement of incoming reference frequency
Gone from version 1 are:
- some voltage regulators
- ring mixer as phase detector, driver amplifiers etc.
- Picdiv ( there were complaints that I didn't have it, but when I put it on the
board, nobody was interested. )
- the "Wenzel" style squarers ( I have seen that in a previous life in a
frequency counter by HEB when 74S was bleeding edge, and in every other text
book.) The LT6??? does that in 5*5 mm.
The phase comparator is now a 3 states FlipFlop comparator in a Xilinx
Coolrunner II CPLD. That also makes the 1pps from most common oscillator
frequencies. Freq and OCXO tuning direction are jumper selectable. The
integrator is a JFET op amp and a foil capacitor.
VHDL sources are abt. 4 pages; 64 FlipFlops max. make sure that it won't grow
without limit. Sources & layout will be open in BSD license style (basically: do
with it what you want but don't bite the feeding hand).
Pics of the status quo: old board with rucksack for the alternative oscillators
and patches, new layout in statu nascendi. Flickr has some problems because they
are moving to a new server farm, so I leave it in the upload stream.
https://www.flickr.com/photos/137684711@N07/47929260287/in/dateposted-public/
Has anybody out there more information about this oscillator?
Its data sheet is thinner than a cookbook from the Sahel zone.
No phase noise data @ 100 MHz??? I've got one of them last week.
https://www.digikey.de/products/de?keywords=xc2265-nd
regards, Gerhard
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