I'm currently getting schematics together for just such a box, to be
open source etc. maybe it can be a TAPR project I dunno.
I'll release round 1 schematics shortly.
Most of my ZCD work to this point usually uses LVDS receivers either
discrete or FPGA IOBUF....
and more lately the ADCMP572 for a 7 GHz undersampling project. Was
considering 16 LVDS receivers and IDELAYS to emulate a single fast
comparator, since there is jitter anyway on the ADCMP572>> FPGA fabric
connection. that jitter is not so much of a problem for my 7 GHz
undersampling apps, but in applications where performance on a 1pps
matters, with a 1 second observation , might need a different approach.
Happy to incorporate / use suggestions for what people what from this
forum...
glen
On 27/07/2019 5:02 AM, Tom Van Baak wrote:
Yes, I'm evaluating a FSA3011 at the moment. It's a cute little unit.
Documentation is sparse, the jpg plots are fuzzy, "customer" support
is nil, but it works. My initial tests show it's ~4x worse than the
data sh
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