-------- In message <[email protected]>, Charles Steinmetz writes:
>Even with the MDAC variety (which can have as many as 16 bits worth of >steps), I can't imagine ending up with sufficient resolution to give >satisfactory step sizes for time nuts purposes, unless you cascade at >least two of them in a "coarse and fine" arrangement. Precisely because the EFC input has finite bandwidth, I have had good luck dithering DAC's between two settings at kHz frequencies, thus effectively adding 8-12 bits to their resolutions, and this gives better linearity and less noise than a coarse/fine combo. HP used this trick in the HP3245A - it's schematic is worth studying. More generally, you can put sigma-delta modulation on top of any kind of DAC. The problem is that at some point, surprisingly early, your analog domain solution runs into the Seebeck effect and all the other volt-nuts embuggerances. So if you really need _high_ resolution, you are better of leaving the EFC input alone, and putting a high resolution DDS on the output of your OCXO. If you need better phase noise than the DDS, then put a cleanup OCXO with fast analog PLL after the DDS. -- Poul-Henning Kamp | UNIX since Zilog Zeus 3.20 [email protected] | TCP/IP since RFC 956 FreeBSD committer | BSD since 4.3-tahoe Never attribute to malice what can adequately be explained by incompetence. _______________________________________________ time-nuts mailing list -- [email protected] To unsubscribe, go to http://lists.febo.com/mailman/listinfo/time-nuts_lists.febo.com and follow the instructions there.
