That entire thread is full of misinformation and should be ignored unless one 
understands the difference between random and data dependent jitter. 

For a well designed divider with a single output frequency only the random 
jitter spec is significant.

One doesn't need a bunch of expensive LeCroy gear to measure RJ of such 
dividers as its PN manifestations are readily apparent and measurable.

Using one of the supposedly super low jitter flipflops isn't a panacea. In 
practice unless an appropriately designed ZCD is used the wideband input noise 
of the very fast FF will dominate and produce much more jitter than expected 
due to the relatively slow slew rate of the outputs of most 10MHz sources.  

Bruce

> On 08/01/2022 12:40 Angus via time-nuts <time-nuts@lists.febo.com> wrote:
> 
>  
> On Fri, 07 Jan 2022 12:40:49 -0800, you wrote:
> 
> >> The two biggest outside influences on the PICDIV are supply voltage and 
> >> temperature.
> >
> >Another interesting influence is the number of outputs that are switching 
> >and 
> >the load on them.  In particular, if you have several outputs running at 
> >different frequencies, the clock-out delay should be slightly longer when 2 
> >outputs switch when compared to when only one is switching.
> >
> >Has anybody measured that on a PIC? (or similar chip)
> >
> >I think one of tvb's picDEVs has several outputs.
> 
> To some extent:
> https://www.eevblog.com/forum/projects/easiest-way-to-divide-10mhz-to-1mhz/msg3257018/#msg3257018
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