I have used the switched capacitor type, with direct control over the
switching caps .
We were able to high speed dither the switch settings to get 1/2 and 1/4
and 1/8 steps of the minimum capacitor switch step. This way, we got
high control resolution.
BUT- this only works for requirements that are tolerant of the switching
spurs, phase mod etc.
The medium term frequency stability was important - over seconds - not
very short term of milli seconds.
If I need very low noise I use a varactor (capacitance) or YIG style
control , analog LPF and single bit sigma delta converter in the FPGA
(free in FPGA fabric) , and a then fractional dither to get my sub-bit
resolution.
-glen
On 19/02/2022 11:24 am, Magnus Danielson via time-nuts wrote:
Hi Erik,
I only saw that thread later, and I will have to return to that as I
have a little more energy.
I'm trying to get you up to speed with
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