Hi All,
Some more work done
There was a calculation error in previous message. The minimum DAC step
is 5 uV which is equal to a relative frequency change of 0.5e-10
The frequency meter used for testing (Picotest U6200A), using a gate
time of 1 s, measured a relative frequency "noise" in the order of 2e-10
so a 1 step DAC change is below the frequency measurement noise.
The 6.5 digit DVM used to measure the Vtune was directly connected to
the Ground and Vtune of the VC-TCXO and is able to resolved all 6.5
digits in the 2 V range (checked with a 1.5 V battery slowly draining)
thus anything down to 1 uV should be visible.
However the DVM measured on the Vtune about 20 uV RMS noise (consistent
with the measured frequency noise), largely independent of the high DAC
output voltage. Only when the total DAC output is set to zero the noise
reduced
This all was consistent with the minimum observable DAC change of 4
steps (20 uV change Vtune and 2e-10 relative frequency change)
Moving to a separate voltage regulator for the DAC and TCXO did not make
a clear difference in the frequency or voltage noise levels.
The DAC used has an internal Vref with a noise level of 290 uVp-p but as
the DAC output noise does not scale to the set output voltage the
reference noise does not seem to be the problem.
The DAC output noise is specified as 1.2 uV/sqrt(Hz) , but I do not
understand how to translate this number to the current measurements
Looking at the noise patterns there seems to be a positive correlation
between voltage going up and frequency going up but noise is a bit
difficult to interpret.
To test if the DAC output voltage noise was causing the frequency noise
the DAC was replaced by a 1.5 V battery. The DVM showed no noise at all
at Vtune with the battery, just a slow draining (1 uV steps) of the
battery. This also proved there is no ground plane problem for the GND/
Vtune of the VC-TCXO.
With the battery the frequency noise remained similar thus proving the
DAC noise was not the major contributor to the frequency noise.
It is possible the 2e-10 noise level is the lower measurement limit of
the frequency meter used (U6200A) with 1 s gate time but I have no way
to check this.
The ADEV of the GPSDO 10MHz output measured over 60 minutes (attached)
stays below 1e-10 and nicely follows the GPS PPS ADEV down starting at 100s
Any suggestions?
There is still a lot to learn.
Erik.
On 22-3-2022 21:29, Dana Whitlow wrote:
Eric,
Do the observed DAC steps correspond in polarity to the observed frequency
changes, or just the reverse? That's a key determination to make in placing
blame, for it tells you whether the DAC steps are causative to the frequency
changes, or rather the PLL's reaction to problems in, say, the VCO itself.
Dana
On Tue, Mar 22, 2022 at 2:10 PM Erik Kaashoek <[email protected]> wrote:
Hi Bob,
By your advice I went for a 6.5 digit DVM and after logging and plotting
the DAC output its clear there are some stability issues in the DAC
output. The voltage is wandering around at about the level of frequency
wandering observed.
A different supply topology for the DAC and VCXO will have to be
created.. The DAC resolution is 50 uV (2.048 V / 400000 steps) but the
random variations are about 4 times p-p larger.
Once this is done I hope longer term logging of frequency and voltage
will make sense.
Or is it better to have a low pass filter between the DAC and the VCXO
Vtune input so the loop is fast enough to remove the remaining drift?
If so, what should the time constant of the filter be compared to the
intersect of the ADEV of the GPS and the VCXO (100 s)?
Having a big time constant (10s?) will be a pain in the initial tuning
and will require active components.
Does owning a 6.5 digit DVM qualify one as a volt-nut? Or should first
some voltage references be added?
Erik.
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