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Smaitra; You may want to start off by looking at
the data sheet for the Atmega device. There are two possible clocks – one
that runs the processors and the other more important for drift is the 32.768Khz
crystal that is used on the Mica2 and Mica2dot and MicaZ platforms. Then pick a specific crystal, and
investigate the parameters of that crystal – model different temperatures;
say -40C, 0C, 20C and +85C to see what the difference will be in theoretical ticks
– say over a year. Then run a standard mote as close to a
couple of the temperatures as possible and see what it thinks it time is. That
is using the hardware with software built on top of it. I’d be interested in your findings,
as I find it not very accurate. Once you’ve understood the ATmega
parameters your question on how the clock drifts is a good one for Atmel.com
technical support. May be they have some models or descriptions of the
underlying silicon processes. I’ve done some system level testing
in this area, and so far I’m not happy with the results. Whether it’s
a software error in handling the output of 32Khz Xtal or too wide range of Xtal
oscillation I haven’t figured out yet. I’d be interested in your results. Neil From: Sharmistha
Maitra [mailto:[EMAIL PROTECTED] Dear All, I am
working on modelling the clock drift of a mote (mica2 ) caused by environmental
conditions like temperature. Can anybody guide me where can I find any
information on this, something like a relation of drift amount and operating
frequency ? My other
question- In general we know that mote frequency can drift by 40 ppm
(natural drift, not due to temperature)....can anybody give me an idea how
frequently does this change happen....I mean in the absence of all external
phenomenon, approx how long will a mote hold on to its previous frequency
before 'naturally' jumping off to the next. All this because current
literatures suggest that short term stability of the motes are good. What is
the extent of this short term ? Thanks... Smaitra. |
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