The only thing I can think of why not to switch to higher DCO is power draw. The same counts for setting SMCLK to DCO instead of DCO/4. Even though all the peripherals can divide it down, power draw is likely to be higher. At the same time, we duty-cycle DCO so the increase might be negligible. At the same time, the higher clock speeds and thus lower transfer times between the mcu and off-chip peripherals could reduce the power draw significantly (especially with the radio). I haven't done the measurements, but my intuition is higher DCO would be better, because the radio is such a big power hog.
The one peripheral we haven't talked about for the TelosB is the UART. It heavily depends on the SMCLK = DCO/4 ~= 1MHz as all the constants for its setup are derived for it. @Eric: with Janos' software implementation of VHT, you basically get 1us synchronization for free. So the question becomes what can you do with such high accuracy of time sync? There are certainly applications out there, that could benefit from it. I have some work in power metering that benefits from this high accuracy. Localization is another one, where time sync accuracy can't be good enough. It seems to me that we need some sort of generalized clock management system. I see similar problems on the ARM cortex side, where every chip has different clock configurations. How about a system module that stores the different clock sources, and peripherals "subscribe" to it? They can get the current clock configurations from it, and configure the peripheral accordingly. In case clocks change, the peripherals get informed through an event, such that they can adapt their configurations. I attempted something like this on the Sam3u/s, but I am far from happy with my implementation. Cheers, Thomas _______________________________________________ Tinyos-help mailing list [email protected] https://www.millennium.berkeley.edu/cgi-bin/mailman/listinfo/tinyos-help
