Hi ALL, CAN someone help me to figure out since the TINYOS system's inner processing core, according to lumped system theory and advanced systems theory in IUPUI, is a MIMO system after all. So, in order to do effectively C# and C++ and even matlab cross-software, even hardware implementations, researchers should first figure out how many input and output ports does the system have before, Verilog and VHDL and even MyHDL language and Labview and future MEMS Based SUGAR Designed Lab-on-Chip can be designed.
Can someone help me? I can find UART1 and UART2 and also Blink (3 ways), no output part other than directly request data from the sensor using RRS protocols, and at the same time, closing the other peripherials and processing cores on the TINYOS board by simply turn off the timer and clock pulses. Thanks. Feng An Formly from IUPUI, Department of ECE, Purdue University Indianapolis Campus, with Professor Kim ([email protected]) and Professor Rizkalla ([email protected]) On Tue, Jan 29, 2013 at 4:00 AM, <[email protected]> wrote: > Send Tinyos-help mailing list submissions to > [email protected] > > To subscribe or unsubscribe via the World Wide Web, visit > > https://www.millennium.berkeley.edu/cgi-bin/mailman/listinfo/tinyos-help > > or, via email, send a message with subject or body 'help' to > [email protected] > > You can reach the person managing the list at > [email protected] > > When replying, please edit your Subject line so it is more specific > than "Re: Contents of Tinyos-help digest..." > > > Today's Topics: > > 1. CTP + LPL + IRIS [Please help me!!!] (Gustavo Zanatta Bruno) > > > ---------------------------------------------------------------------- > > Message: 1 > Date: Mon, 28 Jan 2013 15:34:39 -0200 > From: Gustavo Zanatta Bruno <[email protected]> > Subject: [Tinyos-help] CTP + LPL + IRIS [Please help me!!!] > To: "[email protected]" > <[email protected]> > Message-ID: > <CAADchO5GGMe8_TD=6-n3zwnl5whuxszt75vjrjqs9r+uup0...@mail.gmail.com> > Content-Type: text/plain; charset="iso-8859-1" > > Guys, > you know why the IRIS does not support the implementation of the LPL (Low > Power Listening) with ftsp (Flooding Time Synchronization Protocol). > Not implemented, or there is some impediment of hardware? > I have a network with 60 IRIS and I can not implement a synchronization of > clocks. In MICAZ works well. > > -- > *Atenciosamente:* > *Gustavo Zanatta Bruno* > Mestrando em Ci?ncia da Computa??o > Pesquisador Laborat?rio Tempo Sistemas de Tempo Real e Embarcados > -------------- next part -------------- > An HTML attachment was scrubbed... > URL: > https://www.millennium.berkeley.edu/pipermail/tinyos-help/attachments/20130128/a87f433a/attachment-0001.htm > > ------------------------------ > > _______________________________________________ > Tinyos-help mailing list > [email protected] > https://www.millennium.berkeley.edu/cgi-bin/mailman/listinfo/tinyos-help > > End of Tinyos-help Digest, Vol 117, Issue 54 > ******************************************** _______________________________________________ Tinyos-help mailing list [email protected] https://www.millennium.berkeley.edu/cgi-bin/mailman/listinfo/tinyos-help
