On 03/10/17 11:02, Jason Gunthorpe wrote:
> On Fri, Mar 10, 2017 at 03:58:09AM -0600, Jiandi An wrote:
>
>>      tristate "TPM 2.0 CRB Interface"
>> -    depends on X86 && ACPI
>> +    depends on (X86 || ARM64) && ACPI
>
> Oh, and why is the X86 even here?
>
> Surely it should just be 'depends on ACPI'? I don't remember anything
> x86 specific in CRB?
>
> Jason
>

During testing of my patches on ARM64, I hit crb_cmd_ready() and
crb_go_idle() that fails.  Looking at the comment and commit history,
it was added for fixing Intel PTT hw bug in Skylake and Broxton.
The functions themselves do nothing if flag is CRB_FL_ACPI_START.
I added CRB_FL_CRB_SMC_START which is the new ARM64 start method for
those two functions to also do nothing.  So crb_cmd_ready() and
crb_go_idle() are only for when CRB_FL_ACPI_START.

And in crb_acpi_add(), there is also comments on what drives
CRB_FL_CRB_START to be set.  ACPI_TPM2_COMMAND_BUFFER or
ACPI_TPM2_MEMORY_MAPPED

/* The reason for the extra quirk is that the PTT in 4th Gen Core CPUs
  * report only ACPI start but in practice seems to require both
  * ACPI start and CRB start.
  */

I didn't have too much background on the CRB driver for X86.  I
thought to be safe just or in ARM64.  But if you see no issues,
I'll remove (X86 || ARM64) and just make it depend on ACPI.

Thanks.
- Jiandi

-- 
Qualcomm Datacenter Technologies, Inc.
as an affiliate of Qualcomm Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum,
a Linux Foundation Collaborative Project.

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