Hi TriEmbed, This may be an interesting seminar in CA next week. I plan to attend "Virtually." It is $99 or free with academic credentials. RISC-V is an open source ISA (Instruction Set Architecture) RISC processor. It can be implemented as a standalone ASIC, but it also lends itself to FPGA implementation as a soft core. Since it is open source it has appeal to chip vendors as a way to avoid the license fees of the dominant player in this category, ARM.
Kevin
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