Pete, On the surface this appears to be pot-shots at RISC in-general. What many (including me) didn't know is, RISC has become a significant alternative to CISC. Why? Because orthogonal register usage makes a lot of sense And that Addressing modes solve A lot of problems. I was surprises at how Complex the Reduced Instruction Set Computing had become and the degree that ISC was a big topic in the computing industry. I know that MIPS and other specs tell us RISC doesn't compete well But that hasn't stopped all the small and big low-power specialized processors from being RISC... you posted a longish document so I've only scanned it at this point. But it'd be interesting to banter about RISC v CISC at some point.
On Sun, Aug 16, 2026 at 6:09 PM Pete Soper via TriEmbed < [email protected]> wrote: > Here is a critique of RISCV that makes a number of points: some objective > and some subjective: > > https://dmitry.gr/?r=06.%20Thoughts&proj=12.%20RV > > > Here is a rebuttal challenging some of the points above and filling in > major blanks. This is from someone with a great deal of embedded experience > who lives in an economically challenged location. IMO this blurb makes it > much easier to see the far reaching advantages of RISCV: > https://rvembedded.com/blog_post/12/ > > Pete > _______________________________________________ > Triangle, NC Embedded Interest Group mailing list > > To post message: [email protected] > List info: http://mail.triembed.org/mailman/listinfo/triembed_triembed.org > TriEmbed web site: https://TriEmbed.org > To unsubscribe, click link and send a blank message: mailto: > [email protected]?subject=unsubscribe > Searchable email archive available at > https://www.mail-archive.com/[email protected]/ > > -- Best regards, Mike
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