At least the ME microcode for R600 (and probably earlier CP microcode) is
simple code with separate instructions for reading or writing registers, Rob
Clark of Freedreno partially reverse engineered the instruction format.
Newer Radeons have different ISAs. (ME is microengine, CP is control
processor which has e.g. ME; it's not related to the Intel management engine
used for AMT.)
Lack of existing free compilers is not an issue here: it needs a very simple
assembler and some ISA documentation. It's not like CPU microcode or FPGA
data.
Some time-consuming work is needed to reverse engineer the ISA and replace
the microcode, all interested people that I know have other projects and do
not have enough free time to do this.
(There was an important kernel change regarding microcode dependency: now
modesetting won't work on recent Radeons without the microcode, since the
driver uses features that require it. I don't know the details of these
changes.)
