> Using TYPE661 (input delayer, TESS) I have found some problems, possibly a > bug. > > In my model I checked the printer's outputs from type661 and its behaviour > was as expected. However, the behaviour of other components (some > controllers) using the delayed variables was wrong.
I just ran a quick example and I think you may be right. It looks as if the standard components (before convergence units) are getting inputs from two timesteps back instead of from one timestep back. I'll do some more checking and may have to post an updated 661. Thanks for catching that! Jeff Jeff Thornton President - TESS, LLC 2916 Marketplace Drive - Suite 104 Madison WI 53719 USA Phone: 608-274-2577 Fax: 608-278-1475 E-mail: [EMAIL PROTECTED] Web: www.tess-inc.com _______________________________________________ TRNSYS-users mailing list TRNSYS-users@engr.wisc.edu https://www.cae.wisc.edu/mailman/listinfo/trnsys-users
