Hi Jared, On Fri, Aug 27, 2010 at 2:15 PM, Jared D Schmitz <[email protected]> wrote: > Hello, > > These questions don't pertain directly to the TSS but they are related. > > 1.) The low pin-count bus has signals that support interrupt generation and > direct memory access. To my knowledge, the TPM is not allowed to directly > access memory (for security reasons). Is this true? Also, does the TPM not > support interrupts simply because of manufacturing costs?
True, the TPM is not allowed to directly access main memory. The second question would probably be more easily answered by one of the vendors. > 2.) Does the TPM support bidirectional data transfer? Can it write out the > result out the byte stream resulting from the last operation as it reads in > the next? I'm wondering what triggers the tcsd to start sending the next > command (the beginning of the response packet or its end). No, there's no bidirectional transfer. There's a lock maintained by the tcsd that makes sure TPM access is serialized, per the TSS spec. > 3.) What algorithm does the tcsd use to order requests to the TPM? I would > assume that the simplest algorithm is the order in which they are received, > but it may be something more along the lines of round robin with respect to > user applications. IIRC its first-come-first-served, although some commands between tspi<->tcsd will result in more than one command tcsd<->tpm. There is no round-robin'ing between apps or anything like that. Kent > If the answer to any of these questions is "because the TPM specification is > not strict about X and Y" or "it's up to the manufacturer", then feel free > to say that (although it would be helpful to know what the industry common > practice is in those cases). I'm pretty familiar with the TrouSerS spec, but > I haven't looked much into that of the TPM. > > Thanks, > Jared > > ------------------------------------------------------------------------------ > Sell apps to millions through the Intel(R) Atom(Tm) Developer Program > Be part of this innovative community and reach millions of netbook users > worldwide. Take advantage of special opportunities to increase revenue and > speed time-to-market. Join now, and jumpstart your future. > http://p.sf.net/sfu/intel-atom-d2d > _______________________________________________ > TrouSerS-users mailing list > [email protected] > https://lists.sourceforge.net/lists/listinfo/trousers-users > > ------------------------------------------------------------------------------ This SF.net Dev2Dev email is sponsored by: Show off your parallel programming skills. Enter the Intel(R) Threading Challenge 2010. http://p.sf.net/sfu/intel-thread-sfd _______________________________________________ TrouSerS-users mailing list [email protected] https://lists.sourceforge.net/lists/listinfo/trousers-users
