Depending on the previous SPL support series of TH1520[1], this series further improves usability of TH1520 SoC when booting with mainline SPL.
The T-Head customized IOPMPs are initialized in SPL and a clock driver is ported from Linux kernel to support operation of various peripherals. With this series, it's possible to properly initialize GPIO and eMMC when booting with mainline SPL on the 16GiB variant of Lichee Pi 4A. SDIO controller fails to initialize the SD card sometimes, which may be related to incorrect pin configuration. A bootlog with eMMC/SD information shown could be obtained here[2]. Thanks for your time and review. [1]: https://lore.kernel.org/all/20250513090503.46670-1-zi...@disroot.org/ [2]: https://gist.github.com/ziyao233/75ff1e5b2cf9161093fcc12ed0a62395 Yao Zi (4): riscv: cpu: th1520: Initialize IOPMPs in SPL clk: thead: Port clock controller driver of TH1520 SoC riscv: cpu: th1520: Select clock driver riscv: dts: th1520: Complete clock tree arch/riscv/cpu/th1520/Kconfig | 1 + arch/riscv/cpu/th1520/spl.c | 65 ++ arch/riscv/dts/th1520-lichee-module-4a.dtsi | 8 - arch/riscv/dts/th1520.dtsi | 75 +- arch/riscv/include/asm/arch-th1520/iopmp.h | 42 + drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/thead/Kconfig | 19 + drivers/clk/thead/Makefile | 5 + drivers/clk/thead/clk-th1520-ap.c | 1031 +++++++++++++++++++ 10 files changed, 1204 insertions(+), 44 deletions(-) create mode 100644 arch/riscv/include/asm/arch-th1520/iopmp.h create mode 100644 drivers/clk/thead/Kconfig create mode 100644 drivers/clk/thead/Makefile create mode 100644 drivers/clk/thead/clk-th1520-ap.c -- 2.49.0
