Hi,
> -----Original Message-----
> From: Ravulapalli, Naresh Kumar <naresh.kumar.ravulapa...@altera.com>
> Sent: Tuesday, June 3, 2025 7:55 PM
> To: u-boot@lists.denx.de
> Cc: Marek Vasut <ma...@denx.de>; Simon Goldschmidt
> <simon.k.r.goldschm...@gmail.com>; Chee, Tien Fong
> <tien.fong.c...@altera.com>; Tom Rini <tr...@konsulko.com>; Ravulapalli,
> Naresh Kumar <naresh.kumar.ravulapa...@altera.com>
> Subject: [PATCH v3 2/7] drivers: ddr: altera: Add valid RAM size check for
> arria10
>
> Add call to get_ram_size() function to check memory range for valid RAM.
>
> Signed-off-by: Naresh Kumar Ravulapalli
> <nareshkumar.ravulapa...@altera.com>
> ---
> drivers/ddr/altera/sdram_arria10.c | 19 +++++++++++++++++++
> 1 file changed, 19 insertions(+)
>
> diff --git a/drivers/ddr/altera/sdram_arria10.c
> b/drivers/ddr/altera/sdram_arria10.c
> index 088dc1cb33f..7d7bea153c8 100644
> --- a/drivers/ddr/altera/sdram_arria10.c
> +++ b/drivers/ddr/altera/sdram_arria10.c
> @@ -22,6 +22,7 @@
> #include <linux/bitops.h>
> #include <linux/delay.h>
> #include <linux/kernel.h>
> +#include <hang.h>
>
> DECLARE_GLOBAL_DATA_PTR;
>
> @@ -668,6 +669,22 @@ static int of_sdram_firewall_setup(const void *blob)
> return 0;
> }
>
> +static void sdram_size_check(void)
> +{
> + phys_size_t ram_check = 0;
> +
> + debug("DDR: Running SDRAM size sanity check\n");
> +
> + ram_check = get_ram_size((long *)gd->bd->bi_dram[0].start,
> + gd->bd->bi_dram[0].size);
> + if (ram_check != gd->bd->bi_dram[0].size) {
> + puts("DDR: SDRAM size check failed!\n");
> + hang();
> + }
> +
> + debug("DDR: SDRAM size check passed!\n"); }
"}" should be located at new line below
> +
> int ddr_calibration_sequence(void)
> {
> schedule();
> @@ -722,5 +739,7 @@ int ddr_calibration_sequence(void)
> if (sdram_is_ecc_enabled())
> sdram_init_ecc_bits(gd->ram_size);
>
> + sdram_size_check();
> +
> return 0;
> }
> --
> 2.35.3
BR,
Tien Fong
