Hi Peter,
On 6/30/25 12:25 PM, Peter Robinson wrote:
Add support for MNT Reform2, it works as a carrier board
with a Firefly iCore-3588Q SoM.
Specification:
- Rockchip RK3588
- LPDDR5X 16/32 GB
- eMMC 128/256 GB
- HDMI Type A out x 1
- USB 3.0 Host x 1
- USB-C 3.0 with DisplayPort AltMode
- PCIE M.2 E Key for Wireless connection
- PCIE M.2 M Key for NVME connection
- DSI to eDP panel
- 1Gb Ethernet w/ Microchip KSZ9310 PHY
Tested using Fedora boot on USB stick and eMMC.
Signed-off-by: Peter Robinson <pbrobin...@gmail.com>
---
arch/arm/dts/rk3588-mnt-reform2-u-boot.dtsi | 14 ++++
board/rockchip/evb_rk3588/MAINTAINERS | 6 ++
configs/mnt-reform2-rk3588_defconfig | 87 +++++++++++++++++++++
doc/board/rockchip/rockchip.rst | 1 +
4 files changed, 108 insertions(+)
create mode 100644 arch/arm/dts/rk3588-mnt-reform2-u-boot.dtsi
create mode 100644 configs/mnt-reform2-rk3588_defconfig
diff --git a/arch/arm/dts/rk3588-mnt-reform2-u-boot.dtsi
b/arch/arm/dts/rk3588-mnt-reform2-u-boot.dtsi
new file mode 100644
index 00000000000..d54220a3271
--- /dev/null
+++ b/arch/arm/dts/rk3588-mnt-reform2-u-boot.dtsi
@@ -0,0 +1,14 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+#include "rk3588-u-boot.dtsi"
+
+/ {
+ chosen {
+ u-boot,spl-boot-order = "same-as-spl", &sdmmc, &sdhci;
This is the same as the one in rk3588s-u-boot.dtsi so I think it can be
omitted?
+ };
+};
+
+&fspim2_pins {
+ bootph-pre-ram;
+ bootph-some-ram;
+};
I couldn't see where fspim2_pins is used for this board, are you sure
this is correct? I don't see sfc node being enabled.
diff --git a/board/rockchip/evb_rk3588/MAINTAINERS
b/board/rockchip/evb_rk3588/MAINTAINERS
index 1232f05a387..24cf13c3c48 100644
--- a/board/rockchip/evb_rk3588/MAINTAINERS
+++ b/board/rockchip/evb_rk3588/MAINTAINERS
@@ -29,6 +29,12 @@ F: configs/generic-rk3588_defconfig
F: arch/arm/dts/rk3588-generic.dts
F: arch/arm/dts/rk3588-generic-u-boot.dtsi
+MNT-REFORM2-RK3588
+M: Peter Robinson <pbrobin...@gmail.com>
+S: Maintained
+F: configs/mnt-reform2-rk3588_defconfig
+F: arch/arm/dts/rk3588-mnt-reform2-u-boot.dtsi
+
ORANGEPI-5-RK3588
M: Jonas Karlman <jo...@kwiboo.se>
S: Maintained
diff --git a/configs/mnt-reform2-rk3588_defconfig
b/configs/mnt-reform2-rk3588_defconfig
new file mode 100644
index 00000000000..e76c714b03d
--- /dev/null
+++ b/configs/mnt-reform2-rk3588_defconfig
@@ -0,0 +1,87 @@
+CONFIG_ARM=y
+CONFIG_SKIP_LOWLEVEL_INIT=y
+CONFIG_COUNTER_FREQUENCY=24000000
+CONFIG_ARCH_ROCKCHIP=y
+CONFIG_DEFAULT_DEVICE_TREE="rockchip/rk3588-mnt-reform2"
+CONFIG_ROCKCHIP_RK3588=y
+CONFIG_SPL_SERIAL=y
+CONFIG_TARGET_EVB_RK3588=y
+CONFIG_SYS_LOAD_ADDR=0xc00800
+CONFIG_DEBUG_UART_BASE=0xFEB50000
+CONFIG_DEBUG_UART_CLOCK=24000000
+CONFIG_PCI=y
+CONFIG_DEBUG_UART=y
+CONFIG_USE_PREBOOT=y
+CONFIG_PREBOOT="pci enum; usb start; nvme scan;"
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_SPL_FIT_SIGNATURE=y
+CONFIG_SPL_LOAD_FIT=y
+CONFIG_LEGACY_IMAGE_FORMAT=y
+CONFIG_DEFAULT_FDT_FILE="rockchip/rk3588-mnt-reform2"
Shouldn't that end with .dtb?
+# CONFIG_DISPLAY_CPUINFO is not set
+CONFIG_DISPLAY_BOARDINFO_LATE=y
+CONFIG_SPL_MAX_SIZE=0x40000
+# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
+CONFIG_SPL_ATF=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_GPT=y
+CONFIG_CMD_I2C=y
+CONFIG_CMD_MMC=y
+CONFIG_CMD_PCI=y
+CONFIG_CMD_USB=y
+CONFIG_CMD_USB_MASS_STORAGE=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_REGULATOR=y
+# CONFIG_SPL_DOS_PARTITION is not set
+CONFIG_SPL_OF_CONTROL=y
+CONFIG_OF_LIVE=y
+CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks
assigned-clock-rates assigned-clock-parents"
+CONFIG_SPL_DM_SEQ_ALIAS=y
+CONFIG_SPL_REGMAP=y
+CONFIG_SPL_SYSCON=y
+CONFIG_SPL_CLK=y
+CONFIG_ROCKCHIP_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_SYS_I2C_ROCKCHIP=y
Mmmm CONFIG_SYS_I2C_ROCKCHIP=y appearing twice smells like hand-edited
defconfig, can you run make savedefconfig on it and use that output in
the patch?
+CONFIG_MISC=y
+CONFIG_SUPPORT_EMMC_RPMB=y
+CONFIG_MMC_HS400_ES_SUPPORT=y
+CONFIG_SPL_MMC_HS400_ES_SUPPORT=y
+CONFIG_MMC_HS400_SUPPORT=y
+CONFIG_SPL_MMC_HS400_SUPPORT=y
+CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_SDMA=y
+CONFIG_MMC_SDHCI_ROCKCHIP=y
+CONFIG_PHY_MICREL=y
+CONFIG_PHY_MICREL_KSZ90X1=y
+CONFIG_DWC_ETH_QOS=y
+CONFIG_DWC_ETH_QOS_ROCKCHIP=y
+CONFIG_PHYLIB=y
+CONFIG_NVME_PCI=y
+CONFIG_PCIE_DW_ROCKCHIP=y
+CONFIG_PHY_ROCKCHIP_INNO_USB2=y
+CONFIG_PHY_ROCKCHIP_NANENG_COMBOPHY=y
+CONFIG_PHY_ROCKCHIP_USBDP=y
+CONFIG_SPL_PINCTRL=y
+CONFIG_DM_PMIC=y
+CONFIG_PMIC_RK8XX=y
+CONFIG_REGULATOR_RK8XX=y
+CONFIG_PWM_ROCKCHIP=y
+CONFIG_SPL_RAM=y
+CONFIG_BAUDRATE=1500000
+CONFIG_DEBUG_UART_SHIFT=2
+CONFIG_SYS_NS16550_MEM32=y
+CONFIG_ROCKCHIP_SPI=y
I am not sure this setup actually has an SPI flash? At least couldn't
find it in the device tree in upstream Linux's Rockchip maintainer tree
for 6.17.
Cheers,
Quentin
