Basic support for en7523/en7529/en7562 SoCs. After a patch
the following hardware will be supported:
* spi-nand flashes
* ethernet switch
* serial console
* clock/reset controllers
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevets...@iopsys.eu>
---
arch/arm/dts/en7523-u-boot.dtsi | 90 +++++++++++++++++++++
arch/arm/mach-airoha/Kconfig | 13 +++
arch/arm/mach-airoha/Makefile | 1 +
arch/arm/mach-airoha/en7523/Makefile | 4 +
arch/arm/mach-airoha/en7523/init.c | 31 +++++++
arch/arm/mach-airoha/en7523/lowlevel_init.S | 68 ++++++++++++++++
board/airoha/en7523/Makefile | 3 +
board/airoha/en7523/en7523_rfb.c | 16 ++++
configs/en7523_evb_defconfig | 79 ++++++++++++++++++
include/configs/en7523.h | 19 +++++
10 files changed, 324 insertions(+)
create mode 100644 arch/arm/dts/en7523-u-boot.dtsi
create mode 100644 arch/arm/mach-airoha/en7523/Makefile
create mode 100644 arch/arm/mach-airoha/en7523/init.c
create mode 100644 arch/arm/mach-airoha/en7523/lowlevel_init.S
create mode 100644 board/airoha/en7523/Makefile
create mode 100644 board/airoha/en7523/en7523_rfb.c
create mode 100644 configs/en7523_evb_defconfig
create mode 100644 include/configs/en7523.h
diff --git a/arch/arm/dts/en7523-u-boot.dtsi b/arch/arm/dts/en7523-u-boot.dtsi
new file mode 100644
index 00000000000..3de477202ed
--- /dev/null
+++ b/arch/arm/dts/en7523-u-boot.dtsi
@@ -0,0 +1,90 @@
+// SPDX-License-Identifier: GPL-2.0+
+
+#include <dt-bindings/reset/airoha,en7523-reset.h>
+
+/ {
+ reserved-memory {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ atf-reserved-memory@80000000 {
+ no-map;
+ reg = <0x80000000 0x40000>;
+ };
+ };
+
+ soc {
+ compatible = "simple-bus";
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+
+ scuclk: clock-controller@1fb00000 {
+ bootph-all;
+ compatible = "airoha,en7523-scu", "syscon";
+ reg = <0x1fb00000 0x1000>;
+ #clock-cells = <1>;
+ #reset-cells = <1>;
+ };
+
+ chip_scu: syscon@1fa20000 {
+ compatible = "airoha,en7523-chip-scu", "syscon";
+ reg = <0x1fa20000 0x400>;
+ };
+
+ eth: ethernet@1fb50000 {
+ compatible = "airoha,en7523-eth";
+ reg = <0x1fb50000 0x2600>,
+ <0x1fb54000 0x2000>,
+ <0x1fb56000 0x2000>;
+ reg-names = "fe", "qdma0", "qdma1";
+
+ resets = <&scuclk EN7523_FE_RST>,
+ <&scuclk EN7523_FE_PDMA_RST>,
+ <&scuclk EN7523_FE_QDMA_RST>,
+ <&scuclk EN7523_DUAL_HSI0_MAC_RST>,
+ <&scuclk EN7523_DUAL_HSI1_MAC_RST>,
+ <&scuclk EN7523_HSI_MAC_RST>;
+ reset-names = "fe", "pdma", "qdma",
+ "hsi0-mac", "hsi1-mac", "hsi-mac";
+ };
+
+ switch: switch@1fb58000 {
+ compatible = "airoha,en7523-switch";
+ reg = <0x1fb58000 0x8000>;
+ };
+
+ snfi: spi@1fa10000 {
+ compatible = "airoha,en7523-snand";
+ reg = <0x1fa10000 0x140>,
+ <0x1fa11000 0x600>;
+
+ clocks = <&scuclk EN7523_CLK_SPI>;
+ clock-names = "spi";
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ spi_nand: nand@0 {
+ compatible = "spi-nand";
+ reg = <0>;
+ spi-max-frequency = <50000000>;
+ spi-tx-bus-width = <1>;
+ spi-rx-bus-width = <2>;
+ };
+ };
+ };
+
+ /delete-node/ system-controller@1fa20000;
+ /delete-node/ pcie@1fa91000;
+ /delete-node/ pcie@1fa92000;
+};
+
+&scuclk {
+ compatible = "airoha,en7523-scu", "syscon";
+};
+
+&uart1 {
+ bootph-all;
+};
diff --git a/arch/arm/mach-airoha/Kconfig b/arch/arm/mach-airoha/Kconfig
index be3562ae3ff..d4bf63867b4 100644
--- a/arch/arm/mach-airoha/Kconfig
+++ b/arch/arm/mach-airoha/Kconfig
@@ -6,6 +6,16 @@ config SYS_VENDOR
choice
prompt "Airoha board select"
+config TARGET_EN7523
+ bool "Airoha EN7523 SoC"
+ select CPU_V7A
+ help
+ The Airoha EN7523 family (en7523/en7529/en7562) is an ARM-based
+ SoCs with a dual-core CPU. It comes with Wi-Fi 5/6 support and
+ connectivity to Ethernet PHY, DDR, PCIe, USB, UART and VoIP.
+ With advanced hardware design, EN7523 provides high processing
+ performance and low power consumption.
+
config TARGET_AN7581
bool "Airoha AN7581 SoC"
select ARM64
@@ -20,12 +30,15 @@ config TARGET_AN7581
endchoice
config SYS_SOC
+ default "en7523" if TARGET_EN7523
default "an7581" if TARGET_AN7581
config SYS_BOARD
+ default "en7523" if TARGET_EN7523
default "an7581" if TARGET_AN7581
config SYS_CONFIG_NAME
+ default "en7523" if TARGET_EN7523
default "an7581" if TARGET_AN7581
endif
diff --git a/arch/arm/mach-airoha/Makefile b/arch/arm/mach-airoha/Makefile
index 215a300373b..91395b8a850 100644
--- a/arch/arm/mach-airoha/Makefile
+++ b/arch/arm/mach-airoha/Makefile
@@ -2,4 +2,5 @@
obj-y += cpu.o
+obj-$(CONFIG_TARGET_EN7523) += en7523/
obj-$(CONFIG_TARGET_AN7581) += an7581/
diff --git a/arch/arm/mach-airoha/en7523/Makefile
b/arch/arm/mach-airoha/en7523/Makefile
new file mode 100644
index 00000000000..cd0563d415a
--- /dev/null
+++ b/arch/arm/mach-airoha/en7523/Makefile
@@ -0,0 +1,4 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y += lowlevel_init.o
+obj-y += init.o
diff --git a/arch/arm/mach-airoha/en7523/init.c
b/arch/arm/mach-airoha/en7523/init.c
new file mode 100644
index 00000000000..674bab0363c
--- /dev/null
+++ b/arch/arm/mach-airoha/en7523/init.c
@@ -0,0 +1,31 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <fdtdec.h>
+#include <init.h>
+#include <sysreset.h>
+#include <asm/system.h>
+#include <linux/io.h>
+
+int print_cpuinfo(void)
+{
+ printf("CPU: Airoha EN7523/EN7529/EN7562\n");
+ return 0;
+}
+
+int dram_init(void)
+{
+ return fdtdec_setup_mem_size_base();
+}
+
+int dram_init_banksize(void)
+{
+ return fdtdec_setup_memory_banksize();
+}
+
+void __noreturn reset_cpu(void)
+{
+ writel(0x80000000, 0x1FB00040);
+ while (1) {
+ /* loop forever */
+ }
+}
diff --git a/arch/arm/mach-airoha/en7523/lowlevel_init.S
b/arch/arm/mach-airoha/en7523/lowlevel_init.S
new file mode 100644
index 00000000000..0ac1b85edb8
--- /dev/null
+++ b/arch/arm/mach-airoha/en7523/lowlevel_init.S
@@ -0,0 +1,68 @@
+/*
+ * lowlevel_init.S
+ *
+ * Copyright (C) 2022 Airoha Inc.
+ *
+ * SPDX-License-Identifier: GPL-2.0
+ */
+.globl lowlevel_init
+lowlevel_init:
+ /* Enable SMP bit */
+ mrc p15, 0, r0, c1, c0, 1
+ orr r0, r0, #0x40
+ mcr p15, 0, r0, c1, c0, 1
+ mov pc, lr
+
+.global jumparch64_smc
+jumparch64_smc:
+ mov r4, r3
+ mov r3, r2
+ mov r2, r1
+ mov r1, r0
+ ldr r0, =0x82000200 /* please check MTK_SIP_KERNEL_TMP_AARCH32 in
vendor/arm/atf/include/bl31/services/sip_svc.h */
+# smc #0
+ .word 0xe1600070 @ SMC #0 to enter monitor - hand assembled
+ b .
+
+#if defined(CONFIG_SPL_BUILD) && defined(CONFIG_TPL_BUILD)
+.extern bl31_base_addr
+.extern rst_vector_base_addr
+
+.section .text.arch64
+.globl jumparch64
+jumparch64:
+ mov r4, r1 /* r4 argument */
+ mov r5, r2 /* r5 argument */
+ mov r6, r0 /* keep LK jump addr */
+ mov r7, r3 /* r3 = TEE boot entry, relocate to r7 */
+
+ /* setup the reset vector base address after warm reset to Aarch64 */
+ ldr r0, =bl31_base_addr
+ ldr r0, [r0]
+
+ ldr r1, =rst_vector_base_addr
+ ldr r1, [r1]
+ str r0, [r1]
+
+ /* setup the excution state after warm reset: 1:Aarch64, 0:Aarch32 */
+ mov r2, #0x3
+ mcr p15, 0, r2, c12, c0, 2
+
+ isb
+ dsb
+
+ mov r0, #0
+ mov r1, #0
+ mov r2, #0
+ mov r3, #0
+
+wfi_loop:
+ /* enter WFI to request a warm reset */
+ wfi
+ b wfi_loop
+#endif
+
+.globl do_smc
+do_smc:
+ .word 0xe1600070
+ bx lr
diff --git a/board/airoha/en7523/Makefile b/board/airoha/en7523/Makefile
new file mode 100644
index 00000000000..c6629486f21
--- /dev/null
+++ b/board/airoha/en7523/Makefile
@@ -0,0 +1,3 @@
+# SPDX-License-Identifier: GPL-2.0
+
+obj-y += en7523_rfb.o
diff --git a/board/airoha/en7523/en7523_rfb.c b/board/airoha/en7523/en7523_rfb.c
new file mode 100644
index 00000000000..aa73679d929
--- /dev/null
+++ b/board/airoha/en7523/en7523_rfb.c
@@ -0,0 +1,16 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Author: Christian Marangi <ansuels...@gmail.com>
+ */
+
+#include <asm/global_data.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int board_init(void)
+{
+ /* address of boot parameters */
+ gd->bd->bi_boot_params = CFG_SYS_SDRAM_BASE + 0x100;
+
+ return 0;
+}
diff --git a/configs/en7523_evb_defconfig b/configs/en7523_evb_defconfig
new file mode 100644
index 00000000000..440274853e9
--- /dev/null
+++ b/configs/en7523_evb_defconfig
@@ -0,0 +1,79 @@
+CONFIG_ARM=y
+CONFIG_SYS_ARCH_TIMER=y
+CONFIG_ARCH_AIROHA=y
+CONFIG_TARGET_EN7523=y
+CONFIG_TEXT_BASE=0x81E00000
+CONFIG_SYS_MALLOC_F_LEN=0x4000
+CONFIG_NR_DRAM_BANKS=1
+CONFIG_ENV_SIZE=0x4000
+CONFIG_ENV_OFFSET=0x7c000
+CONFIG_DM_GPIO=y
+CONFIG_DEFAULT_DEVICE_TREE="airoha/en7523-evb"
+CONFIG_SYS_LOAD_ADDR=0x81800000
+CONFIG_BUILD_TARGET="u-boot.bin"
+# CONFIG_EFI_LOADER is not set
+CONFIG_FIT=y
+CONFIG_FIT_VERBOSE=y
+CONFIG_BOOTDELAY=3
+CONFIG_DEFAULT_FDT_FILE="en7523-evb"
+CONFIG_SYS_PBSIZE=1049
+CONFIG_SYS_CONSOLE_IS_IN_ENV=y
+# CONFIG_DISPLAY_BOARDINFO is not set
+CONFIG_HUSH_PARSER=y
+CONFIG_SYS_PROMPT="U-Boot> "
+CONFIG_SYS_MAXARGS=8
+CONFIG_CMD_BOOTZ=y
+CONFIG_CMD_BOOTMENU=y
+# CONFIG_CMD_ELF is not set
+# CONFIG_CMD_XIMG is not set
+CONFIG_CMD_BIND=y
+CONFIG_CMD_GPIO=y
+CONFIG_CMD_MTD=y
+CONFIG_CMD_SF_TEST=y
+CONFIG_CMD_SPI=y
+# CONFIG_CMD_SETEXPR is not set
+CONFIG_CMD_PING=y
+CONFIG_CMD_EXT4=y
+CONFIG_CMD_FAT=y
+CONFIG_CMD_FS_GENERIC=y
+CONFIG_CMD_MTDPARTS=y
+CONFIG_CMD_LOG=y
+CONFIG_OF_UPSTREAM=y
+CONFIG_ENV_OVERWRITE=y
+CONFIG_ENV_IS_IN_MMC=y
+CONFIG_ENV_RELOC_GD_ENV_ADDR=y
+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
+CONFIG_NET_RANDOM_ETHADDR=y
+CONFIG_SYS_RX_ETH_BUFFER=8
+CONFIG_REGMAP=y
+CONFIG_SYSCON=y
+CONFIG_CLK=y
+CONFIG_DMA=y
+CONFIG_LED=y
+CONFIG_LED_GPIO=y
+CONFIG_MTD=y
+CONFIG_DM_MTD=y
+CONFIG_MTD_SPI_NAND=y
+CONFIG_DM_SPI_FLASH=y
+CONFIG_SPI_FLASH_EON=y
+CONFIG_SPI_FLASH_GIGADEVICE=y
+CONFIG_SPI_FLASH_ISSI=y
+CONFIG_SPI_FLASH_MACRONIX=y
+CONFIG_SPI_FLASH_SPANSION=y
+CONFIG_SPI_FLASH_STMICRO=y
+CONFIG_SPI_FLASH_WINBOND=y
+CONFIG_SPI_FLASH_MTD=y
+CONFIG_AIROHA_ETH=y
+CONFIG_PHY=y
+CONFIG_PINCTRL=y
+CONFIG_PINCONF=y
+CONFIG_POWER_DOMAIN=y
+CONFIG_DM_REGULATOR=y
+CONFIG_DM_REGULATOR_FIXED=y
+CONFIG_RAM=y
+CONFIG_DM_SERIAL=y
+CONFIG_SYS_NS16550=y
+CONFIG_SPI=y
+CONFIG_DM_SPI=y
+CONFIG_AIROHA_SNFI_SPI=y
+CONFIG_SHA512=y
diff --git a/include/configs/en7523.h b/include/configs/en7523.h
new file mode 100644
index 00000000000..bc62116ffcc
--- /dev/null
+++ b/include/configs/en7523.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Configuration for Airoha EN7523
+ */
+
+#ifndef __EN7523_H
+#define __EN7523_H
+
+#include <linux/sizes.h>
+
+#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
+
+#define CFG_SYS_INIT_RAM_ADDR CONFIG_TEXT_BASE
+#define CFG_SYS_INIT_RAM_SIZE SZ_2M
+
+/* DRAM */
+#define CFG_SYS_SDRAM_BASE 0x80000000
+
+#endif
--
2.47.2
