From: Marek Vasut <marek.va...@mailbox.org>
Sent: Tuesday, July 29, 2025 12:39 AM
> Enable SoC pull up for USB OTG ID pin in SPL. There is no dedicated pull up
> resistor on the SoM itself, and the pull up is mandatory for correct USB OTG
> ID pin detection. U-Boot proper already configures the USB OTG ID pin pull
> up via DT pinctrl node entry.
>
> Signed-off-by: Marek Vasut <marek.va...@mailbox.org>
> ---
> Cc: Andreas Geisreiter <ageisrei...@dh-electronics.de>
> Cc: Christoph Niedermaier <cniederma...@dh-electronics.com>
> Cc: Tom Rini <tr...@konsulko.com>
> Cc: u-b...@dh-electronics.com
> Cc: u-boot@lists.denx.de
> ---
> board/dhelectronics/dh_imx6/dh_imx6_spl.c | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/board/dhelectronics/dh_imx6/dh_imx6_spl.c
> b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
> index a50763e1926..eb9bc93d973 100644
> --- a/board/dhelectronics/dh_imx6/dh_imx6_spl.c
> +++ b/board/dhelectronics/dh_imx6/dh_imx6_spl.c
> @@ -49,6 +49,10 @@
> (PAD_CTL_PUS_47K_UP | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm | \
> PAD_CTL_SRE_FAST | PAD_CTL_HYS)
>
> +#define OTG_PAD_CTRL \
> + (PAD_CTL_PUS_100K_UP | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm | \
> + PAD_CTL_SRE_SLOW | PAD_CTL_HYS)
> +
> static const struct mx6dq_iomux_ddr_regs dhcom6dq_ddr_ioregs = {
> .dram_sdclk_0 = 0x00020030,
> .dram_sdclk_1 = 0x00020030,
> @@ -509,7 +513,7 @@ int board_mmc_init(struct bd_info *bis)
>
> /* USB */
> static iomux_v3_cfg_t const usb_pads[] = {
> - IOMUX_PADS(PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(NO_PAD_CTRL)),
> + IOMUX_PADS(PAD_GPIO_1__USB_OTG_ID | MUX_PAD_CTRL(OTG_PAD_CTRL)),
> IOMUX_PADS(PAD_EIM_D31__GPIO3_IO31 | MUX_PAD_CTRL(NO_PAD_CTRL)),
> };
Tested-by: Christoph Niedermaier <cniederma...@dh-electronics.com>
