Hey all,

I've updated to the v6.16-dts tag in master now, and there's a few
things with that change. First, to avoid some breakage on Rockhip with
Quentin's help I've applied a few Rockchip and also one USB series to
keep things in sync. Sorry for stepping on toes here. Second, I had to
perform a few fixups of existing dts* files. I'm pretty sure these
changes are right based on reading the diff from v6.15-dts to v6.16-dts
but for the record, here's the partial merge commit diffs for review:

diff --cc arch/arm/dts/apq8016-sbc-u-boot.dtsi
index c8a46ed14483,000000000000..26d4506815ea
mode 100644,000000..100644
--- a/arch/arm/dts/apq8016-sbc-u-boot.dtsi
+++ b/arch/arm/dts/apq8016-sbc-u-boot.dtsi
@@@ -1,20 -1,0 +1,20 @@@
 +// SPDX-License-Identifier: GPL-2.0
 +/*
 + * Copyright (c) 2024, Linaro Ltd.
 + */
 +
 +/ {
 +      /* When running as a first-stage bootloader this isn't filled in 
automatically */
 +      memory@80000000 {
 +              reg = <0 0x80000000 0 0x40000000>;
 +      };
 +};
 +
 +/*
 + * When running as a first-stage bootloader, we need to re-configure the UART 
pins
 + * because SBL de-initialises them. Indicate that the UART pins should be 
configured
 + * during all boot stages.
 + */
- &blsp_uart2_default {
++&blsp_uart2_console_default {
 +      bootph-all;
 +};
diff --cc arch/arm/dts/apq8016-schneider-hmibsc.dts
index 75c6137e5a11,000000000000..d8257fc077f9
mode 100644,000000..100644
--- a/arch/arm/dts/apq8016-schneider-hmibsc.dts
+++ b/arch/arm/dts/apq8016-schneider-hmibsc.dts
@@@ -1,491 -1,0 +1,491 @@@
[snip]
 +
- &blsp_uart1_default {
++&blsp_uart1_console_default {
 +      bootph-all;
 +};
 +
[snip]
diff --cc arch/arm/dts/sun8i-v3s.dtsi
index 9e13c2aa8911,000000000000..b3a325347629
mode 100644,000000..100644
--- a/arch/arm/dts/sun8i-v3s.dtsi
+++ b/arch/arm/dts/sun8i-v3s.dtsi
@@@ -1,656 -1,0 +1,656 @@@
[snip]
 +              csi1: camera@1cb4000 {
 +                      compatible = "allwinner,sun8i-v3s-csi";
 +                      reg = <0x01cb4000 0x3000>;
 +                      interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
 +                      clocks = <&ccu CLK_BUS_CSI>,
-                                <&ccu CLK_CSI1_SCLK>,
++                               <&ccu CLK_CSI_SCLK>,
 +                               <&ccu CLK_DRAM_CSI>;
 +                      clock-names = "bus", "mod", "ram";
 +                      resets = <&ccu RST_BUS_CSI>;
 +                      status = "disabled";
 +              };
 +      };
 +};

-- 
Tom

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