It's Broadcom PHY simply described as single-port
RGMII 10/100/1000BASE-T PHY.

Signed-off-by: Jim Liu <jjl...@nuvoton.com>
---
 drivers/net/phy/broadcom.c | 37 +++++++++++++++++++++++++++++++++++++
 1 file changed, 37 insertions(+)

diff --git a/drivers/net/phy/broadcom.c b/drivers/net/phy/broadcom.c
index 0a49015eb89..1c02e3efedc 100644
--- a/drivers/net/phy/broadcom.c
+++ b/drivers/net/phy/broadcom.c
@@ -134,6 +134,33 @@ static void bcm_phy_write_misc(struct phy_device *phydev,
        phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA, value);
 }
 
+/* Broadcom BCM54612E */
+static int bcm54612e_config(struct phy_device *phydev)
+{
+       u32 reg = 0;
+
+       genphy_config_aneg(phydev);
+
+       phy_reset(phydev);
+
+       /* 125Mhz Clock Output Enable */
+       reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL);
+       reg |= 0xD34;
+       phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL, reg);
+
+       reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA);
+       reg |= (1 << 1);
+       phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_DATA, reg);
+
+       reg = phy_read(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL);
+       reg &= 0xfffff000;
+       phy_write(phydev, MDIO_DEVAD_NONE, MIIM_BCM54XX_EXP_SEL, reg);
+
+       genphy_restart_aneg(phydev);
+
+       return 0;
+}
+
 /* Broadcom BCM5461S */
 static int bcm5461_config(struct phy_device *phydev)
 {
@@ -434,6 +461,16 @@ U_BOOT_PHY_DRIVER(bcm5461s) = {
        .shutdown = &genphy_shutdown,
 };
 
+U_BOOT_PHY_DRIVER(bcm54612e) = {
+       .name = "Broadcom BCM54612E",
+       .uid = 0x03625e6a,
+       .mask = 0xfffff0,
+       .features = PHY_GBIT_FEATURES,
+       .config = &bcm54612e_config,
+       .startup = &bcm54xx_startup,
+       .shutdown = &genphy_shutdown,
+};
+
 U_BOOT_PHY_DRIVER(bcm5464s) = {
        .name = "Broadcom BCM5464S",
        .uid = 0x2060b0,
-- 
2.34.1

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