Hi all, Proposing the following fix to address data cache handling issues in the Agilex5 platform, particularly in the SPL build and SMC mailbox communication path. It ensures correctness in cache operations. Other than that, trying to resolve undefined symbol errors, and provides the necessary configuration to disable data cache in SPL where required.
Patch Summary: [1/3] arch: arm: mach-socfpga: smc: Add dcache flushing and invalidation in smc_send_mailbox() Ensures that the response buffer from the secure monitor call (SMC) is properly invalidated in cache to avoid stale data access. Updates pointer arithmetic by replacing u64 with uintptr_t to improve portability and correctness. [2/3] cache: Check dcache availability before calling cache functions Adds a !CONFIG_IS_ENABLED(SYS_DCACHE_OFF) check before calling dcache_status() and mmu_status() to avoid compilation failures when dcache is disabled. [3/3] configs: agilex5: Enable config SPL_SYS_DCACHE_OFF Disables SPL data cache explicitly via CONFIG_SPL_SYS_DCACHE_OFF to align with the above changes and prevent inconsistencies during early boot. This patchset has been tested on Agilex5 and resolves the SPL build issues related to missing symbols, while also improving runtime robustness in SMC-based communication. Let me know if there are any concerns or feedback. Thank you! Changes from previous submitted patches: v1: Using weak function to resolve the compilation failed with undefined function when invoking cache related function. https://patchwork.ozlabs.org/project/uboot/patch/ 20250806032206.16688-3-boon.khai...@altera.com/ Boon Khai Ng (3): arch: arm: mach-socfpga: smc: Add dcache flushing and invalidation in smc_send_mailbox() cache: Check dcache availability before calling cache functions configs: agilex5: Enable config SPL_SYS_DCACHE_OFF arch/arm/include/asm/io.h | 28 ++++++++++++++++------------ arch/arm/mach-socfpga/smc_api.c | 1 + common/memsize.c | 5 ++++- configs/socfpga_agilex5_defconfig | 1 + 4 files changed, 22 insertions(+), 13 deletions(-) -- 2.35.3
