commit: http://blackfin.uclinux.org/git/?p=u-boot;a=commitdiff;h=7cb3dce7523ac6f7f652beadd01ad5eef932e5bc branch: http://blackfin.uclinux.org/git/?p=u-boot;a=shortlog;h=refs/heads/trunk
Signed-off-by: Sonic Zhang <sonic.zh...@analog.com> --- arch/blackfin/include/asm/mach-bf609/anomaly.h | 8 ++++---- arch/blackfin/include/asm/mach-common/bits/dde.h | 10 +++++----- arch/blackfin/include/asm/mach-common/bits/mpu.h | 2 +- 3 files changed, 10 insertions(+), 10 deletions(-) diff --git a/arch/blackfin/include/asm/mach-bf609/anomaly.h b/arch/blackfin/include/asm/mach-bf609/anomaly.h index 78570b0..0fcd65c 100644 --- a/arch/blackfin/include/asm/mach-bf609/anomaly.h +++ b/arch/blackfin/include/asm/mach-bf609/anomaly.h @@ -38,13 +38,13 @@ #define ANOMALY_16000010 (1) /* False Hardware Error when RETI Points to Invalid Memory */ #define ANOMALY_16000011 (1) -/* Speculative Fetches of Indirect-Pointer Instructions Can Cause False Hardware Errors */ +/* Speculative Fetches of Indirect-Pointer Inst Can Cause False Hw Errors */ #define ANOMALY_16000012 (1) /* False Hardware Errors Caused by Fetches at the Boundary of Reserved Memory */ #define ANOMALY_16000013 (1) /* False Hardware Error from an Access in the Shadow of a Conditional Branch */ #define ANOMALY_16000014 (1) -/* Multi-Issue Instruction with dsp32shiftimm in slot1 and P-reg Store in slot2 Not Supported */ +/* Multi-Issue Inst with dsp32shiftimm in slot1 and P in slot2 Not Supported */ #define ANOMALY_16000015 (1) /* Speculative Fetches Can Cause Undesired External FIFO Operations */ #define ANOMALY_16000017 (1) @@ -54,11 +54,11 @@ #define ANOMALY_16000019 (1) /* rom_SysControl() Fails to Set DDR0_CTL.INIT for Wakeup From Hibernate */ #define ANOMALY_16000020 (1) -/* rom_SysControl() Fails to Save and Restore DDR0_PHYCTL3 for Hibernate/Wakeup Sequence */ +/* rom_SysControl() Fails to Save and Restore DDR0_PHYCTL3 for Hb/Wk Sequence */ #define ANOMALY_16000021 (1) /* Boot Code Fails to Enable Parity Fault Detection */ #define ANOMALY_16000022 (1) -/* USB DMA interrupt status do not show the DMA channel interrupt in the DMA ISR */ +/* USB DMA interrupt status do not show the DMA channel intr in the DMA ISR */ #define ANOMALY_16000027 (1) /* Interrupted Core Reads of MMRs May Cause Data Loss */ #define ANOMALY_16000030 (1) diff --git a/arch/blackfin/include/asm/mach-common/bits/dde.h b/arch/blackfin/include/asm/mach-common/bits/dde.h index d7ad991..f7b0bb9 100644 --- a/arch/blackfin/include/asm/mach-common/bits/dde.h +++ b/arch/blackfin/include/asm/mach-common/bits/dde.h @@ -8,7 +8,7 @@ /* DMA_CONFIG Masks */ #define DMAEN (1 << DMAEN_P) /* DMA Channel Enable */ #define WNR (1 << WNR_P) /* Channel Direction (W/R*) */ -#define SYNC (1 << SYNC_P) /* Synchronize Work Unit Transitions */ +#define SYNC (1 << SYNC_P) /* Sync Work Unit Transitions */ #define CADDR (1 << CADDR_P) /* Use Current Address */ #define PSIZE (7 << PSIZE_P) /* Peripheral Word Size */ #define PSIZE_1 (0 << PSIZE_P) @@ -65,15 +65,15 @@ #define PDRF_P 28 /* DMA_STATUS Masks */ -#define DMA_DONE (1 << DMA_DONE_P) /* Work Unit/Row Done Interrupt */ +#define DMA_DONE (1 << DMA_DONE_P) /* Work Unit/Row Done */ #define DMA_ERR (1 << DMA_ERR_P) /* Error Interrupt */ -#define DMA_PIRQ (1 << DMA_PIRQ_P) /* Peripheral Interrupt Request */ +#define DMA_PIRQ (1 << DMA_PIRQ_P) /* Peri Intr Request */ #define DMA_ERRC (7 << DMA_ERRC_P) /* Error Cause */ #define DMA_RUN (7 << DMA_RUN_P) /* Run Status */ -#define DMA_PBWIDTH (3 << DMA_PBWIDTH_P) /* Peripheral Bus Width */ +#define DMA_PBWIDTH (3 << DMA_PBWIDTH_P) /* Peri Bus Width */ #define DMA_MBWIDTH (3 << DMA_MBWIDTH_P) /* Memory Bus Width */ #define DMA_FIFOFILL (7 << DMA_FIFOFILL_P) /* FIFO Fill Status */ -#define DMA_TWAIT (1 << DMA_TWAIT_P) /* Trigger Wait Status */ +#define DMA_TWAIT (1 << DMA_TWAIT_P) /* Trigger Wait Stat */ #define DMA_DONE_P 0 #define DMA_ERR_P 1 diff --git a/arch/blackfin/include/asm/mach-common/bits/mpu.h b/arch/blackfin/include/asm/mach-common/bits/mpu.h index d067ef9..cfde236 100644 --- a/arch/blackfin/include/asm/mach-common/bits/mpu.h +++ b/arch/blackfin/include/asm/mach-common/bits/mpu.h @@ -74,7 +74,7 @@ #define PAGE_SIZE_64KB 0x00050000 /* 64 KB page size */ #define PAGE_SIZE_16MB 0x00060000 /* 16 MB page size */ #define PAGE_SIZE_64MB 0x00070000 /* 64 MB page size */ -#define PAGE_SIZE_MASK 0x00070000 /* the bits for the page_size field */ +#define PAGE_SIZE_MASK 0x00070000 /* page_size field mask */ #define PAGE_SIZE_SHIFT 16 #define CPLB_L1SRAM 0x00000020 /* 0=SRAM mapped in L1, 0=SRAM not mapped to L1 */ #define CPLB_PORTPRIO 0x00000200 /* 0=low priority port, 1= high priority port */
_______________________________________________ U-Boot-commits mailing list U-Boot-commits@blackfin.uclinux.org https://blackfin.uclinux.org/mailman/listinfo/u-boot-commits
