[EMAIL PROTECTED] wrote: > On Sat, 5 Jan 2008, Stefan Roese wrote: > > Here comes a trivial patch to cpu/arm926ejs/davinci/nand.c. Unfortunately I > don't have hardware handy so I can not test it at the moment but changes are > rather trivial so it should work. It would be nice if somebody with a > hardware checked it anyways.
Seems okay. I wrote the same image to location A in NAND with mainline U-Boot and to location B using recent u-boot-nand-flash.git. Then read both locations back to SDRAM and cmp was happy. A short look to ECCs using nand dump looked okay as well. Many thanks Dirk Btw: Any idea why erase percentage output is so strange? "200% complete"? > nand info Device 0: NAND 64MiB 1,8V 8-bit, sector size 16 KiB > nand erase 0x100000 0x2000 NAND erase: device 0 offset 0x100000, size 0x2000 Erasing at 0x100000 -- 200% complete. OK > ------------------------------------------------------------------------- Check out the new SourceForge.net Marketplace. It's the best place to buy or sell services for just about anything Open Source. http://ad.doubleclick.net/clk;164216239;13503038;w?http://sf.net/marketplace _______________________________________________ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
