Hi Stefan,
After looking at nand_command_lp( ), I added following piece of code
everytime I send address to NAND flash.
#ifdef CFG_NAND_4_ADDR_CYCLE
/* Begin command latch cycle */
this->hwcontrol(mtd, NAND_CTL_SETCLE);
/* Write out the start read command */
this->write_byte(mtd, NAND_CMD_READSTART);
/* End command latch cycle */
this->hwcontrol(mtd, NAND_CTL_CLRCLE);
#endif /* CFG_NAND_4_ADDR_CYCLE */
This change along with the change in nand_spl padding and change in
board configuration file defines, I got the 440EPx to boot from the
1Gb NAND flash.
Thanks,
Nikhil
On Feb 11, 2008 8:26 AM, Stefan Roese <[EMAIL PROTECTED]> wrote:
> Hi Nikhil,
>
> On Monday 11 February 2008, Nikhil Gautam wrote:
> > I bypassed the function nand_is_bad_block( ) and also my image is now
> > padded correctly. But still the problem is that SPL doesn't copy the
> > U-boot image correctly onto the RAM. It copies the first page of first
> > block from NAND flash again and again.
>
> Now this could be an indication for what is going wrong here.
>
> > This must be because of some configuration of NDFC done by SPL because
> > I can see that IPL copied the first 4K (2 pages) correctly from NAND
> > flash to RAM. But there aren't many NDFC or NAND configuration
> > parameter that I can change.
> >
> > Have anyone seen this kind of problem before?
>
> No.
>
> But as mentioned above, if you see the same 2k page multiple times, it seems
> that the addressing in nand_command() (nand_boot.c) is not correct for those
> 2k page devices. And looking at nand_base.c you will notice two different
> implementations for nand_command:
>
> nand_command() and
> nand_command_lp() (lp for Large Page)
>
> I suggest you take a look at this and merge the needed changes into
> nand_boot.c
>
>
> Best regards,
> Stefan
>
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