This adds a new CONFIG_DEBUG_SERIAL define so that people can figure out
if/when their serial port is hitting errors.

Signed-off-by: Mike Frysinger <[EMAIL PROTECTED]>
---
 cpu/blackfin/serial.c |   57 +++++++++++++++++++++++++++++++++++++++++-------
 1 files changed, 48 insertions(+), 9 deletions(-)

diff --git a/cpu/blackfin/serial.c b/cpu/blackfin/serial.c
index 0dfee51..f538bba 100644
--- a/cpu/blackfin/serial.c
+++ b/cpu/blackfin/serial.c
@@ -35,6 +35,29 @@
 
 #include "serial.h"
 
+#ifdef CONFIG_DEBUG_SERIAL
+uint16_t cached_lsr[256];
+uint16_t cached_rbr[256];
+size_t cache_count;
+#endif
+
+/* The LSR is read-to-clear on some parts, so we have to make sure status
+ * bits aren't inadvertently lost when doing various tests.
+ */
+static uint16_t uart_lsr_save;
+static uint16_t uart_lsr_read(void)
+{
+       uint16_t lsr = *pUART_LSR;
+       uart_lsr_save |= (lsr & (OE|PE|FE|BI));
+       return lsr | uart_lsr_save;
+}
+/* Just do the clear for everyone since it can't hurt. */
+static void uart_lsr_clear(void)
+{
+       uart_lsr_save = 0;
+       *pUART_LSR |= -1;
+}
+
 /* Symbol for our assembly to call. */
 void serial_set_baud(uint32_t baud)
 {
@@ -61,6 +84,12 @@ int serial_init(void)
 {
        serial_initialize();
        serial_setbrg();
+       uart_lsr_clear();
+#ifdef CONFIG_DEBUG_SERIAL
+       cache_count = 0;
+       memset(cached_lsr, 0x00, sizeof(cached_lsr));
+       memset(cached_rbr, 0x00, sizeof(cached_rbr));
+#endif
        return 0;
 }
 
@@ -73,7 +102,7 @@ void serial_putc(const char c)
        WATCHDOG_RESET();
 
        /* wait for the hardware fifo to clear up */
-       while (!(*pUART_LSR & THRE))
+       while (!(uart_lsr_read() & THRE))
                continue;
 
        /* queue the character for transmission */
@@ -83,14 +112,14 @@ void serial_putc(const char c)
        WATCHDOG_RESET();
 
        /* wait for the byte to be shifted over the line */
-       while (!(*pUART_LSR & TEMT))
+       while (!(uart_lsr_read() & TEMT))
                continue;
 }
 
 int serial_tstc(void)
 {
        WATCHDOG_RESET();
-       return (*pUART_LSR & DR) ? 1 : 0;
+       return (uart_lsr_read() & DR) ? 1 : 0;
 }
 
 int serial_getc(void)
@@ -102,15 +131,25 @@ int serial_getc(void)
                continue;
 
        /* clear the status and grab the new byte */
-       uart_lsr_val = *pUART_LSR;
+       uart_lsr_val = uart_lsr_read();
        uart_rbr_val = *pUART_RBR;
 
+#ifdef CONFIG_DEBUG_SERIAL
+       cached_lsr[cache_count] = uart_lsr_val;
+       cached_rbr[cache_count] = uart_rbr_val;
+       cache_count = (cache_count + 1) % ARRAY_SIZE(cached_lsr);
+#endif
+
        if (uart_lsr_val & (OE|PE|FE|BI)) {
-               /* Some parts are read-to-clear while others are
-                * write-to-clear.  Just do the write for everyone
-                * since it cant hurt (other than code size).
-                */
-               *pUART_LSR = (OE|PE|FE|BI);
+#ifdef CONFIG_DEBUG_SERIAL
+               printf("\n[SERIAL ERROR]\n");
+               do {
+                       --cache_count;
+                       printf("\t%3i: RBR=0x%02x LSR=0x%02x\n", cache_count,
+                               cached_rbr[cache_count], 
cached_lsr[cache_count]);
+               } while (cache_count > 0);
+#endif
+               uart_lsr_clear();
                return -1;
        }
 
-- 
1.5.4.2


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