On Mon, Apr 07, 2008 at 02:31:10PM +0530, Tiju wrote: > Hi Harald, > > The serial issues were solved. As u said, the problem was with the > RTS/CTS. I disabled all the hardware control signals and some > modifications with the relocation section in the start.S and it > started working.
great. > Now the issue is with the kernel CRC32 check. I compiled a kernel with > the smdk2440 architecture and I do the following. Please see my other e-mail response about this. I still believe there might be some wrong memory / bus / core clock timing and or voltage issues. please try to use u-boot's built-in memory verification code to veryify your memory before trying to boot a kernel on it. What basically happens is that u-boot copies your kernel image from storage medium to SDRAM, and then tries to checksum it. If the original image is correct, and the copy in SDRAM isn't, this means that you somehow have memory corruption. Is the hardware a prototype of a new board, or is it proven, verified hardware? If it's a new board, there can be dozens of different reasons why the PLL might run instable, the power lines have too much noise, etc. Even if it's verified hardware, the particular PLL speed for memory or CPU clock used by your u-boot image might not be within whatever your hardware configuration supports. So I would reconfigure all memory timings to their most conservative (slowest) setting, and run the bus at 25 or 50MHz, the CPU core at 100MHz and re-try. If the memory check and/or system boot works this way, you can try to increase the timings incrementally up to your desired configuration. -- - Harald Welte <[EMAIL PROTECTED]> http://laforge.gnumonks.org/ ============================================================================ "Privacy in residential applications is a desirable marketing option." (ETSI EN 300 175-7 Ch. A6)
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