Hi,

On 10 Apr 2008 at 13:08, Martin Krause wrote:
> > After some tries (i2c md ..) the bus hangs and no more transactions
> > can 
> > be seen on the bus.
> 
> One reason for a hanging bus could be a lost clock pulse. This could
> happen, if the low->high rise time of the bus signal is longer than
> the clock pulse width. For testing you could try a lower bus clock 
> (10 kHz for example).

sorry if I did not follow the discussion up to here. As I stumbled over
it yesterday, I just want to give another example how to hang a bus.

There are devices (namely LM75) that claim to be I2C devices but
do not care about I2C specification. In case of LM75, a read must
always be 16 bit (2 bytes), in case of reading only 1 byte the device
does not interpret the missing ACK correctly and, in case the
last byte read is '0', it will block the bus until some more (worst
case 8) SCL pulses follow.

Maybe something like this could also happen in your case?

Regards,
Wolfgang


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