Hi p, [EMAIL PROTECTED] wrote on Tuesday, April 22, 2008 3:10 AM: > Sorry for the newb question but I've been googling like mad and can't > find any clues (or more likely, can't understand what I do find). > > I'm looking at speed.c under /cpu/arm920t/s3c24xx and thinking this is > the business end of CPU speed setting. I've been greping the source to
No, in /cpu/arm920t/s3c24x0/speed.c are only functions to read the clock configuration. The setting of the clocks is done in the board specific initilaisation code. For the SMDK2410 for example in /board/smdk2410/smdk2410.c. The MPLL Clock (and thus the derived CPU clock FCLK) is configured via the PLL divider values MDIV, PDIV and SDIV. For a detailed description take a look into the S3C2410 datasheet (search for the MPLL register in the chapter Clock & Power Management). Regards, Martin Krause -- TQ-Systems GmbH Muehlstrasse 2, Gut Delling, D-82229 Seefeld Amtsgericht Muenchen, HRB 105 018, UST-IdNr. DE 811 607 913 Geschaeftsfuehrer: Dipl.-Ing. (FH) Detlef Schneider, Dipl.-Ing. (FH) Ruediger Stahl http://www.tq-group.com ------------------------------------------------------------------------- This SF.net email is sponsored by the 2008 JavaOne(SM) Conference Don't miss this year's exciting event. There's still time to save $100. Use priority code J8TL2D2. http://ad.doubleclick.net/clk;198757673;13503038;p?http://java.sun.com/javaone _______________________________________________ U-Boot-Users mailing list U-Boot-Users@lists.sourceforge.net https://lists.sourceforge.net/lists/listinfo/u-boot-users
