Hi Ame,

> So maybe I need to clarify some more.  The PPC460 data sheet
> is not too clear on this yet.  However, here are my thoughts
> on this.  Lets just take the simple case as an example.  We
> have a plurality of 460s where a single one is the master.
> Between the master and all the slaves is a PCI bridge.  The
> slaves are hardwired to boot from pci bus memory -- according
> to the datasheet that is at a fixed address.  So there does 
> not appear to be any need to do anything to the slave upon
> power up. 

Really? I didn't see a comment about the fixed address when
I parsed the data sheet. Where is that comment in
PP460EX_DS2063.pdf, rev 1.09 April 14, 2008?

> Now the master boots and then allocates a chunk
> of contiguous memory using a kernel driver or whatever is
> needed.  The image is just whatever the flash image would
> normally contain (uboot + kernel + rootfs). 

Or you could just have a u-boot image, and then use u-boot
to fetch the kernel and rootfs.

> The address of that chunk is then given to the pci bridge
> so that it can perform inbound translation from the address
> that the PPC slaves will use to the address where the image
> is physically located.  Then the slaves are taken out of reset
> and begin reading "flash" across the pci bus which really goes
> through the bridge and is mapped to the DRAM on the master (or I 
> guess it could be the flash on the master, but DRAM seemed
> easier since it is already running).  
> 
> Ok, so how many holes does this approach have?

This seems reasonable to me.

However, without the full users manual for the 460EX, and the
users manual for the pci bridge, I can't really comment more.

Cheers,
Dave


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