Hi Gary,
On Friday 25 April 2008, Gary Jennejohn wrote:
> Handle Stefan's comments. This has the added benefit of making the
> patch considerably smaller.
Looks much better now. Just some minor issues (nitpicking) left. See comments
below.
> diff --git a/board/quad100hd/quad100hd.c b/board/quad100hd/quad100hd.c
> new file mode 100644
> index 0000000..52cceee
> --- /dev/null
> +++ b/board/quad100hd/quad100hd.c
> @@ -0,0 +1,93 @@
> +/*
> + * (C) Copyright 2008
> + * Gary Jennejohn, DENX Software Engineering GmbH, [EMAIL PROTECTED]
> + *
> + * Based in part on board/icecube/icecube.c from PPCBoot
> + * (C) Copyright 2003 Intrinsyc Software
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +#include <common.h>
> +#include <command.h>
> +#include <malloc.h>
> +#include <environment.h>
> +#include <logbuff.h>
> +#include <post.h>
> +
> +#include <asm/processor.h>
> +#include <asm/io.h>
> +#include <asm/gpio.h>
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int board_early_init_f(void)
> +{
> + /* taken from PPCBoot */
> + mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
> + mtdcr(uicer, 0x00000000); /* disable all ints */
> + mtdcr(uiccr, 0x00000000);
> + mtdcr(uicpr, 0xFFFF7FFE); /* set int polarities */
> + mtdcr(uictr, 0x00000000); /* set int trigger levels */
> + mtdcr(uicsr, 0xFFFFFFFF); /* clear all ints */
> + mtdcr(uicvcr, 0x00000001); /* set vect base=0,INT0 highest
> priority */
> +
> + mtdcr (CPC0_SRR, 0x00040000); /* Hold PCI bridge in reset */
Please use only one coding style in one file. So either:
func();
or
func ();
Since this file mostly consists of the func() style I suggest you switch to
this one completely.
> + return 0;
> +}
> +
> +/*
> + * Check Board Identity:
> + */
> +int checkboard(void)
> +{
> + char *s = getenv("serial#");
> +#ifdef DISPLAY_BOARD_INFO
> + sys_info_t sysinfo;
> +#endif
> +
> + puts("Board: Quad100hd");
> +
> + if (s != NULL) {
> + puts(", serial# ");
> + puts(s);
> + }
> + putc('\n');
> +
> +#ifdef DISPLAY_BOARD_INFO
> + /* taken from ppcboot */
> + get_sys_info (&sysinfo);
Again.
> + printf("\tVCO: %lu MHz\n", sysinfo.freqVCOMhz);
> + printf("\tCPU: %lu MHz\n", sysinfo.freqProcessor / 1000000);
> + printf("\tPLB: %lu MHz\n", sysinfo.freqPLB / 1000000);
> + printf("\tOPB: %lu MHz\n", sysinfo.freqOPB / 1000000);
> + printf("\tEPB: %lu MHz\n", sysinfo.freqPLB / (sysinfo.pllExtBusDiv *
> + 1000000));
> + printf ("\tPCI: %lu MHz\n", sysinfo.freqPCI / 1000000);
Again.
> +#endif
> +
> + return (0);
> +}
> +
> +long int initdram(int board_type)
> +{
> + return (CFG_SDRAM_SIZE);
> +}
<snip>
> diff --git a/include/configs/quad100hd.h b/include/configs/quad100hd.h
> new file mode 100644
> index 0000000..89504fd
> --- /dev/null
> +++ b/include/configs/quad100hd.h
> @@ -0,0 +1,299 @@
> +/*
> + * (C) Copyright 2008
> + * Gary Jennejohn, DENX Software Engineering GmbH, [EMAIL PROTECTED]
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +/************************************************************************
> + * quad100hd.h - configuration for Quad100hd board
> + ***********************************************************************/
> +#ifndef __CONFIG_H
> +#define __CONFIG_H
> +
> +/*-----------------------------------------------------------------------
> + * High Level Configuration Options
> + *----------------------------------------------------------------------*/
> +#define CONFIG_QUAD100HD 1 /* Board is Quad100hd */
> +#define CONFIG_4xx 1 /* ... PPC4xx family */
> +#define CONFIG_405EP 1 /* Specifc 405EP support*/
> +
> +#define CONFIG_SYS_CLK_FREQ 33333333 /* external frequency to pll */
> +
> +#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
> +
> +#define PLLMR0_DEFAULT PLLMR0_266_133_66 /* no PCI */
> +#define PLLMR1_DEFAULT PLLMR1_266_133_66 /* no PCI */
> +
> +#define CFG_ENV_IS_IN_EEPROM 1 /* use the EEPROM for environment vars
> */ +
> +#define CONFIG_OVERWRITE_ETHADDR_ONCE 1
After you removed the default MAC addresses, I suggest that you remove this
define too.
> +#define CONFIG_NET_MULTI 1
> +#define CONFIG_HAS_ETH1 1
> +#define CONFIG_MII 1 /* MII PHY management */
> +#define CONFIG_PHY_ADDR 0x01 /* PHY address
> */
> +#define CFG_RX_ETH_BUFFER 16 /* Number of ethernet rx buffers &
> descriptors */ +#define CONFIG_PHY_RESET 1
> +#define CONFIG_PHY_RESET_DELAY 300 /* PHY RESET recovery delay
> */
> +
> +/*
> + * Command line configuration.
> + */
> +#include <config_cmd_default.h>
> +
> +#undef CONFIG_CMD_ASKENV
> +#undef CONFIG_CMD_CACHE
> +#define CONFIG_CMD_DHCP
> +#undef CONFIG_CMD_DIAG
> +#define CONFIG_CMD_EEPROM
> +#undef CONFIG_CMD_ELF
> +#define CONFIG_CMD_I2C
> +#undef CONFIG_CMD_IRQ
> +#define CONFIG_CMD_JFFS2
> +#undef CONFIG_CMD_LOG
> +#undef CONFIG_CMD_MII
> +#define CONFIG_CMD_NAND
> +#undef CONFIG_CMD_PING
> +#define CONFIG_CMD_REGINFO
> +
> +#undef CONFIG_WATCHDOG /* watchdog disabled
> */
> +
> +/*-----------------------------------------------------------------------
> + * SDRAM
> + *----------------------------------------------------------------------*/
> +/*
> + * SDRAM configuration (please see cpu/ppc/sdram.[ch])
> + */
> +#define CONFIG_SDRAM_BANK0 1
> +#define CFG_SDRAM_SIZE 0x02000000 /* 32 MB */
> +
> +/* FIX! SDRAM timings used in datasheet */
> +#define CFG_SDRAM_CL 3 /* CAS latency */
> +#define CFG_SDRAM_tRP 20 /* PRECHARGE command period */
> +#define CFG_SDRAM_tRC 66 /* ACTIVE-to-ACTIVE command period
> */ +#define CFG_SDRAM_tRCD 20 /* ACTIVE-to-READ delay */
> +#define CFG_SDRAM_tRFC 66 /* Auto refresh period */ +
> +/*
> + * JFFS2
> + */
> +#define CFG_JFFS2_FIRST_BANK 0
> +#ifdef CFG_KERNEL_IN_JFFS2
> +#define CFG_JFFS2_FIRST_SECTOR 0 /* JFFS starts at block 0 */
> +#else /* kernel not in JFFS */
> +#define CFG_JFFS2_FIRST_SECTOR 8 /* block 0-7 is kernel (1MB = 8
> sectors) */ +#endif
> +#define CFG_JFFS2_NUM_BANKS 1
> +
> +/*-----------------------------------------------------------------------
> + * Serial Port
> + *----------------------------------------------------------------------*/
> +#undef CFG_EXT_SERIAL_CLOCK /* external serial
> clock */
> +#define CFG_BASE_BAUD 691200
> +#define CONFIG_BAUDRATE 115200
> +#define CONFIG_SERIAL_MULTI
> +
> +/* The following table includes the supported baudrates */
> +#define CFG_BAUDRATE_TABLE \
> + {300, 600, 1200, 2400, 4800, 9600, 19200, 38400, 57600, 115200, 230400}
> +
> +/*-----------------------------------------------------------------------
> + * Miscellaneous configurable options
> + *----------------------------------------------------------------------*/
> +#define CFG_LONGHELP /* undef to save memory */
> +#define CFG_PROMPT "=> " /* Monitor Command Prompt */
> +#if defined(CONFIG_CMD_KGDB)
> +#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
> +#else
> +#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
> +#endif
> +#define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /*
> Print Buffer Size */ +#define CFG_MAXARGS 16 /* max number of
> command args */
> +#define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
> +
> +#define CFG_MEMTEST_START 0x0400000 /* memtest works on */
> +#define CFG_MEMTEST_END 0x0C00000 /* 4 ... 12 MB in DRAM
> */
> +
> +#define CFG_LOAD_ADDR 0x100000 /* default load address
> */
> +#define CFG_EXTBDINFO 1 /* To use extended board_info
> (bd_t) */
> +
> +#define CFG_HZ 1000 /* decrementer freq: 1 ms ticks
> */
> +
> +#define CONFIG_LOADS_ECHO 1 /* echo on for serial download */
> +#define CFG_LOADS_BAUD_CHANGE 1 /* allow baudrate change
> */
> +
> +#define CONFIG_CMDLINE_EDITING 1 /* add command line history
> */
> +#define CONFIG_LOOPW 1 /* enable loopw command */
> +#define CONFIG_MX_CYCLIC 1 /* enable mdc/mwc commands */
> +#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0
> */ +#define CONFIG_VERSION_VARIABLE 1 /* include version env variable */ +
> +/*-----------------------------------------------------------------------
> + * I2C
> + *----------------------------------------------------------------------*/
> +#define CONFIG_HARD_I2C 1 /* I2C with hardware
> support */
> +#undef CONFIG_SOFT_I2C /* I2C bit-banged
> */
> +#define CFG_I2C_SPEED 400000 /* I2C speed and slave
> address */
> +#define CFG_I2C_SLAVE 0x7F
> +
> +#define CFG_I2C_EEPROM_ADDR 0x50 /* base address */
> +#define CFG_I2C_EEPROM_ADDR_LEN 2 /* bytes of address */
> +
> +#define CFG_EEPROM_PAGE_WRITE_BITS 5 /* 8 byte write page size */
> +#define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10
> msec */
> +#define CFG_EEPROM_SIZE 0x2000
> +
> +/*-----------------------------------------------------------------------
> + * Start addresses for the final memory configuration
> + * (Set up by the startup code)
> + * Please note that CFG_SDRAM_BASE _must_ start at 0
> + */
> +#define CFG_SDRAM_BASE 0x00000000
> +#define CFG_FLASH_BASE 0xFFC00000
> +#define CFG_MONITOR_LEN (256 * 1024) /* Reserve 256 kB for
> Monitor */
> +#define CFG_MALLOC_LEN (128 * 1024) /* Reserve 128 kB for
> malloc() */
> +#define CFG_MONITOR_BASE 0xFFF80000
CFG_MONITOR_BASE at 0xfff80000 makes me think that the U-Boot image has a size
of 512k. But CFG_MONITOR_LEN is 256k. Which one is correct? I would think
that 256k should be enough for this image.
> +/*
> + * For booting Linux, the board info and command line data
> + * have to be in the first 8 MB of memory, since this is
> + * the maximum mapped by the Linux kernel during initialization.
> + */
> +#define CFG_BOOTMAPSZ (8 << 20) /* Initial Memory map
> for Linux */
> +
> +/*-----------------------------------------------------------------------
> + * FLASH organization
> + */
> +#define CFG_FLASH_CFI /* The flash is CFI compatible
> */
> +#define CFG_FLASH_CFI_DRIVER
> +
> +#define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
> +
> +#define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
> +#define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
Starting here
> +#define CFG_FLASH_WORD_SIZE unsigned short
> +#define CFG_FLASH_ADDR0 0x0555
> +#define CFG_FLASH_ADDR1 0x02aa
> +#define FLASH_BASE0_PRELIM CFG_FLASH_BASE /* FLASH bank #0 */
till here. These defines are most likely not needed for the CFI driver. Please
remove them.
Please fix and resubmit. Thanks.
Best regards,
Stefan
=====================================================================
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: [EMAIL PROTECTED]
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